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Patent EP0154871A2 successfully refreshed from Google Patents.
EP0154871A2
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EP
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One-transistor dynamic random-access memory
Assignee: Hitachi Ltd
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Filing: 1985-02-22
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Granted: —
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Expires: 2005-02-22
Abstract
Abstract in a semiconductor memory having memory cells, a groove (17) is formed in a semiconductor substrate (10), and a semiconductor layer (20) is charged into said groove (17) via an insulating film (18) to form a capacitor electrode. The semiconductor layer (20) stretches on the insulating film (11) formed on the semiconductor substrate (10) and comes into contact with the substrate (10) passing through a hole formed in the insulating film (11) thereby to form a base portion of a switching MOS transistor. The source and drain regions (151, 152) of the transistor are formed on said semiconductor layer on the insulating film (11).
Inventors
- 👤 Yuji Yatsuda
- 👤 Hideo Sunami
- 👤 Osamu Minato
- 👤 Masakazu Aoki
- 👤 Katsuaki Takagi
- 👤 Masashi Horiguchi
- 👤 Masao Tamura
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 13:36
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10B12/37; H10B12/31; H10B12/20; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6326; H10P14/6349; H10P32/00; H10P32/30; H10P32/302
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
149 words
A semiconductor memory comprising a capacitor (1) having a data storage portion, and a switching insulated gate field-effect transistor (2), wherein said capacitor (1) has a main portion of capacitor electrode (20) which is electrically connected to the source or the drain of said field-effect transistor (2), said main portion being formed in a groove (17) provided in a semiconductor substrate (10), said field-effect transistor (2) having a region (101) in direct contact with the semiconductor substrate (10) and another region (151,152) formed in a second semiconductor layer disposed on an insulating film (11), said field-effect transistor further having main regions of the source and drain in the regions (151, 152) of said second semiconductor layer formed on said insulating film (11), and a main region of the channel formed on a region of said second semiconductor layer (101) that is in direct contact with the semiconductor substrate (10).
Claim 2
Dependent Claim
149 words
A semiconductor memory comprising a capacitor (1) having a data storage portion, and a switching insulated gate field-effect transistor (2), wherein said capacitor (1) has a main portion of capacitor electrode (20) which is electrically connected to the source or the drain of said field-effect transistor (2), said main portion being formed in a groove (17) provided in a semiconductor substrate (10), said field-effect transistor (2) having a region (101) in direct contact with the semiconductor substrate (10) and another region (151,152) formed in a second semiconductor layer disposed on an insulating film (11), said field-effect transistor further having main regions of the source and drain in the regions (151, 152) of said second semiconductor layer formed on said insulating film (11), and a main region of the channel formed on a region of said second semiconductor layer (101) that is in direct contact with the semiconductor substrate (10).
Claim 3
Dependent Claim
33 words
The semiconductor memory of claim 1, wherein a surface concentration of the semiconductor substrate (10) is greater than 1 0 17 cm -3 in a region where a memory cell will be formed.
Claim 4
Dependent Claim
34 words
The semiconductor memory of claim 1 or 2, wherein said semiconductor substrate (10) is composed of silicon, and said second semiconductor layer (151, 152) consists of a silicon layer formed by the epitaxial method.
Claim 5
Dependent Claim
43 words
The semiconductor memory of claim 1 or 2, wherein said semiconductor substrate (10) is composed of silicon, and said second semiconductor layer (151, 152) consists of a layer that is formed by depositing polycrystalline silicon and partially crystallizing the polycrystalline silicon by annealing.
References Cited (Backward Citations)
No citation records indexed.
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