Patent EP0153764A2 successfully refreshed from Google Patents.
EP0153764A2
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Information processor having an interruption operating function
Assignee: NEC Corp
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Filing: 1985-03-04
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Granted: —
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Expires: 2005-03-04
Abstract
Abstract An information processor has at least one interface unit by which the processor is coupled to a peripheral equipment. The interface unit can selectively generates either a first mode signal or a second mode signal when the processor performs an interruption operation according to request from the peripheral equipment. When the processor performs the interruption operation in response to the first mode signal, a stack operation for saving information necessary to restart a program execution which is stopped by the interruption to a stack memory is performed before start of the interruption operation. While the processor can perform the interruption operation in response to the second mode signal without the stack operation, whereby an improved processor with less overhead can be provided.
Inventors
- 👤 Osamu C/O Nec Corporation Matsushima
- 👤 Yukio C/O Nec Corporation Maehashi
- 👤 Shigetatsu C/O Nec Corporation Katori
- 👤 Masahiro C/O Nec Corporation Nomura
- 👤 Hiroko C/O Nec Corporation Shinohara
- 👤 Kohichi C/O Nec Corporation Kariya
- 👤 Mitsue C/O Nec Corporation Abe
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 11:58
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/20; G06F13/32
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
180 words
An information processor comprising a program memory, a central processing unit performing a normal program operation and an interruption operation and at least one interface unit to be coupled to a peripheral equipment for transferring data between-said central processing unit and said peripheral equipment, said central processing unit including a program counter for reading instructions out of said program memory, a status word register storing information which indicates an execution condition on said central processing unit and a stack memory for saving a content of at least one of said program counter and said status word register, said interface unit generating a first made signal designating a normal interruption and a second node signal designating a special interruption, said central processing unit executing the normal interruption after the content of at least one of said program counter and said status word register is saved in said stack memory in response to said first mode signal, and executing the special interruption without saving the contents of said program counter and said status word register in response to said second mode signal.
Claim 2
Dependent Claim
180 words
An information processor comprising a program memory, a central processing unit performing a normal program operation and an interruption operation and at least one interface unit to be coupled to a peripheral equipment for transferring data between-said central processing unit and said peripheral equipment, said central processing unit including a program counter for reading instructions out of said program memory, a status word register storing information which indicates an execution condition on said central processing unit and a stack memory for saving a content of at least one of said program counter and said status word register, said interface unit generating a first made signal designating a normal interruption and a second node signal designating a special interruption, said central processing unit executing the normal interruption after the content of at least one of said program counter and said status word register is saved in said stack memory in response to said first mode signal, and executing the special interruption without saving the contents of said program counter and said status word register in response to said second mode signal.
Claim 3
Dependent Claim
32 words
An information processor as claimed in Claim 1, said interface unit further comprising means for activating said first mode signal after said central processing unit terminates the operation of said special interruption.
Claim 4
Dependent Claim
19 words
An information processor as claimed in claim 1, wherein said interface unit has an analog to degital conversion function.
Claim 5
Dependent Claim
19 words
An information processor as claimed in Claim 1, wherein said interface unit has a digital to analog conversion function.
Claim 6
Dependent Claim
17 words
An information processor as claimed in Claim 1, wherein said interface unit has a data communication function.
Claim 7
Dependent Claim
24 words
An information processor as claimed in Claim 5, wherein said interface unit executes at least one of a data transmission and a data reception.
Claim 8
Dependent Claim
21 words
An information processor as claimed in Claim 5, wherein said interface unit executes the data communication according to a timer output.
Claim 9
Dependent Claim
17 words
An information processor as claimed in Claim 1, wherein said interface unit has a motor driving function.
Claim 10
Dependent Claim
27 words
An information processor as claimed in Claim 1, wherein said interface unit is coupled to a printer and has transfers data to be printed to the printer.
Claim 11
Dependent Claim
28 words
An information processor as claimed in Claim 1, wherein said interface unit is coupled to a display means and transfers data to be displayed to the display means.
Claim 12
Dependent Claim
27 words
An information processor as claimed in Claim 1, wherein said interface unit is coupled to a keyboard means and transfers a scanning signal to the keyboard means.
Claim 13
Dependent Claim
80 words
An information processor comprising a program execution unit executing a program operation and an interruption operation, a stack means for saving information necessary to restart a program operation which is stopped by the interruption operation, means for generating a mode signal in response to request of the interruption, and control means controlling the interruption operation in such manner that said program execution unit starts the interruption operation without saving the information in said stack means according to said mode signal.
Claim 14
Dependent Claim
80 words
An information processor comprising a program execution unit executing a program operation and an interruption operation, a stack means for saving information necessary to restart a program operation which is stopped by the interruption operation, means for generating a mode signal in response to request of the interruption, and control means controlling the interruption operation in such manner that said program execution unit starts the interruption operation without saving the information in said stack means according to said mode signal.
Claim 15
Dependent Claim
106 words
An information processor comprising a counter for counting a clock, storage means for temporarily storing a value of the counter, means for generating an interruption request signal, a memory for storing a program, a central processing unit for selectively executing a first processing according to said interruption request signal and a second processing according to said program, said central processing unit having a counter control means for performing arithmetic operation and transmission of a data stored in said storage means as holding a status in execution of caid second processing, said counter control means performing said first processing when said counter generates said interruption request signal.
Claim 16
Dependent Claim
106 words
An information processor comprising a counter for counting a clock, storage means for temporarily storing a value of the counter, means for generating an interruption request signal, a memory for storing a program, a central processing unit for selectively executing a first processing according to said interruption request signal and a second processing according to said program, said central processing unit having a counter control means for performing arithmetic operation and transmission of a data stored in said storage means as holding a status in execution of caid second processing, said counter control means performing said first processing when said counter generates said interruption request signal.
Claim 17
Dependent Claim
95 words
An information processor comprising an A/D conversion processing means for generating a converted data and a conversion end signal according to a closing of A/D conversion, a memory for storing a program, a central processing unjt executing a processing according to said conversion end signal and a processing according to said program selectively, an A/D conversion control means transferring said converted data from said A/D conversion processing means to said central processing unit in an interruption mode without stack operation for saving information necessary to restart said program which is stopped by the interruption mode.
Claim 18
Dependent Claim
95 words
An information processor comprising an A/D conversion processing means for generating a converted data and a conversion end signal according to a closing of A/D conversion, a memory for storing a program, a central processing unjt executing a processing according to said conversion end signal and a processing according to said program selectively, an A/D conversion control means transferring said converted data from said A/D conversion processing means to said central processing unit in an interruption mode without stack operation for saving information necessary to restart said program which is stopped by the interruption mode.
References Cited (Backward Citations)
No citation records indexed.
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