Patent EP0151408A2 successfully refreshed from Google Patents.
EP0151408A2
Expired / Lapsed
EP
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A method of forming a patterned resist mask for etching via holes in an insulating layer
Assignee: International Business Machines Corp
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Filing: 1985-01-17
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Granted: —
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Expires: 2005-01-17
Abstract
Abstract A layer of positive resist is treated before development by exposing it to a forming gas plasma while its surface is bombarded with ions and electrons in a high voltage biased environment in which the resist layer is capacitively coupled. The resist layer is exposed to a pattern of radiation (eg ultraviolet light) defining the positions of via holes either before or after the forming gas plasma treatment. Development of the resist layer produces a mask having a pattern of via holes with rounded sidewalls.
Inventors
- 👤 Cheng-Yih Liu
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-04 15:55
CPC Classifications
G; G03; G03F; G03F7/00; G03F7/26; G03F7/38; H; H05; H05K; H05K3/00; H05K3/0011; H05K3/0017
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
117 words
1 . A method of forming a patterned resist mask for etching via holes in an insulating layer, the method comprising exposing a positive resist layer to a pattern of radiation.defining the positions of via holes, developing the resist layer in a developer solution to form the patterned mask, the method being characterised by subjecting the resist layer before it is developed to a forming gas (containing nitrogen and hydrogen) plasma and bombarding the surface of the resist layer with ions and electrons in a high voltage biased environment in which resist layer is capacitively coupled for such a time that the solubility of an upper portion of the resist layer in the developer solution is increased.
Claim 2
Dependent Claim
117 words
1 . A method of forming a patterned resist mask for etching via holes in an insulating layer, the method comprising exposing a positive resist layer to a pattern of radiation.defining the positions of via holes, developing the resist layer in a developer solution to form the patterned mask, the method being characterised by subjecting the resist layer before it is developed to a forming gas (containing nitrogen and hydrogen) plasma and bombarding the surface of the resist layer with ions and electrons in a high voltage biased environment in which resist layer is capacitively coupled for such a time that the solubility of an upper portion of the resist layer in the developer solution is increased.
Claim 3
Dependent Claim
28 words
A method as claimed in claim 1, in which the resist layer is exposed to a pattern of ultraviolet light before it is subjected to the plasma treatment.
Claim 4
Dependent Claim
28 words
A method as claimed in claim 1, in which the resist layer is exposed to a pattern of ultraviolet light after it is subjected to the plasma treatment.
Claim 5
Independent Claim
17 words
A method as claimed in any preceding claim, in which the positive resist is of the AZ-type.
Claim 6
Independent Claim
26 words
A method as claimed in any preceding claim, in which the resist layer is exposed to the ion and electron bombardment for 10 to 60 seconds.
Claim 7
Dependent Claim
25 words
A method as claimed in claim 5, in which the resist layer is exposed to the ion and electron bombardment for 15 to 25 seconds.
Claim 8
Independent Claim
20 words
A method as claimed in any preceding claim, in which the voltage of the environment is 50 to 2000 volts.
Claim 9
Dependent Claim
19 words
A method as claimed in claim 7 in which the voltage of the environment is 300 to 400 volts.
References Cited (Backward Citations)
No citation records indexed.
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