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EP0150633A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Driver system for a A.C. plasma panel

Assignee: Thales SA
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Filing: 1984-09-21
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Granted: —
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Expires: 2004-09-21
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Abstract

Abstract Translated from French Dans un circuit de commande d'un panneau à plasma de type alternatif, les circuits d'interface basse tension/ haute tension (BT/HT) des circuit intégrés (Y) associés au second réseau d'électrodes sont alimentés an haute tension (E + y, E -y ) par les deux amplificateurs (A 1 , A 2 ) associés à chacun de ces circuits intégrés. Lors de l'élaboration des signaux d'inscription et d'effacement, l'un des amplificateurs (A I ) fournit la tension (E + y) à appliquer aux électrodes sélectionnées, à inscrire ou à effacer, alors que l'autre amplificateur (A 2 ) fournit la tension (E-y) à appliquer aux électrodes non sélectionnés. In a control circuit of an alternating type plasma panel, the low voltage / high voltage (BT / HT) interface circuits of the integrated circuits (Y) associated with the second electrode network are supplied with high voltage (E + y, E -y ) by the two amplifiers (A 1 , A 2 ) associated with each of these integrated circuits. When developing the write and erase signals, one of the amplifiers (A I ) supplies the voltage (E + y) to be applied to the selected electrodes, to be registered or erased, while the other amplifier (A 2 ) supplies the voltage (Ey) to be applied to the non-selected electrodes.

Inventors

  • 👤 Louis Delgrange
  • 👤 Françoise Vialettes

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-09 14:22
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/687; H03K17/6871; H03K17/6872; G; G09; G09G; G09G3/00; G09G3/20; G09G3/22; G09G3/28; G09G3/288; G09G3/296; G09G3/297

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