Patent EP0150423A2 successfully refreshed from Google Patents.
EP0150423A2
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EP
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C-MOS basic cells arrangement
Assignee: Toshiba Corp
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Filing: 1984-12-17
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Granted: —
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Expires: 2004-12-17
Abstract
Abstract There is disclosed a semiconductor integrated circuit device in which the gate of a MOSFET of one circuit of the P channel MOSFET is connected to the gate of a MOSFET of the other circuit of the P channel MOSFET, and the gate of a MOSFET of one circuit of the N channel MOSFET is connected to the gate of a MOSFET of the other circuit of the N channel MOSFET.
Inventors
- 👤 Yasutaka C/O Patent Division Haji
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-01 16:15
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/90; H10D84/903; H10D84/907
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
187 words
A semiconductor integrated circuit device comprising: a plurality of basic cells arranged in a predetermined pattern, each of the basic cells comprising first and second MOSFET circuits, the first MOSFET circuit comprising a plurality of MOSFETs of a first channel type, and the second MOSFET circuit comprising a plurality of MOSFETs of-a second channel type, characterized in that the first MOSFET circuit comprises first and second MOSFET series paths; the second MOSFET circuit comprises third and fourth MOSFET series paths; each of the first and second MOSFET series path comprises a plurality of MOSFETs of the first channel type connected in series; each of the third and fourth MOSFET series path comprises a plurality of MOSFETs of the second channel type connected in series; the gate of each of the MOSFETs of the first MOSFET series path is connected to the gate of a corresponding one of the MOSFETs of the second MOSFET series path; and the gate of each of the MOSFETs of the third MOSFET series path is connected to the gate of a corresponding one of the MOSFETs of the fourth MOSFET series path.
Claim 2
Dependent Claim
187 words
A semiconductor integrated circuit device comprising: a plurality of basic cells arranged in a predetermined pattern, each of the basic cells comprising first and second MOSFET circuits, the first MOSFET circuit comprising a plurality of MOSFETs of a first channel type, and the second MOSFET circuit comprising a plurality of MOSFETs of-a second channel type, characterized in that the first MOSFET circuit comprises first and second MOSFET series paths; the second MOSFET circuit comprises third and fourth MOSFET series paths; each of the first and second MOSFET series path comprises a plurality of MOSFETs of the first channel type connected in series; each of the third and fourth MOSFET series path comprises a plurality of MOSFETs of the second channel type connected in series; the gate of each of the MOSFETs of the first MOSFET series path is connected to the gate of a corresponding one of the MOSFETs of the second MOSFET series path; and the gate of each of the MOSFETs of the third MOSFET series path is connected to the gate of a corresponding one of the MOSFETs of the fourth MOSFET series path.
Claim 3
Dependent Claim
51 words
A semiconductor integrated circuit device according to claim 1, characterized in that: the number of said MOSFETs constituting each of the first, second, third and fourth MOSFET series paths, is two; and said first channel type is an N channel type and said second channel type is a P channel type.
Claim 4
Dependent Claim
51 words
A semiconductor integrated circuit device according to claim 1, characterized in that: the number of said MOSFETs constituting each of the first, second, third and fourth MOSFET series paths, is three; and said first channel type is an N channel type and said second channel type is a P channel type.
References Cited (Backward Citations)
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