Patent EP0144724A1 successfully refreshed from Google Patents.
EP0144724A1
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EP
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Speech synthesizing apparatus
Assignee: Toshiba Corp
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Filing: 1984-10-31
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Granted: —
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Expires: 2004-10-31
Abstract
Abstract @ A speech synthesizing apparatus including a periodic sound signal generator circuit (10) for generating a voiced sound signal synchronously with a clock pulse in accordance with pitch data corresponding to a speech to be synthesized; and a digital filter (1) for filter-processing the voiced sound signal generated from the periodic sound signal generator circuit (10) in accordance with synthesis parameters which are generated in correspondence to a speech to be synthesized. This periodic sound signal generator circuit (10) includes a memory (101) which has stored therein a predetermined number of sampling values within a predetermined time range of a continuous wave signal which is obtained by developing the voiced sound signal based on an interpolation function; and a processing unit (100, 102) for sequentially reading out the sampling values of the continuous wave signal within the predetermined time range that are synchronized with the pitch period represented by the input pitch data from the memory (101) in response to the clock pulse.
Inventors
- 👤 Kazuo c/o Patent Division Sumita
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-03 16:46
CPC Classifications
G; G10; G10L; G10L13/00; G10L13/02
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
228 words
A speech synthesizing apparatus comprising: a control circuit (5) for generating synthesis parameters, pitch data and clock pulses corresponding to speech to be synthesized; a periodic-sound-signal- generating means (100 to 102; 110 to 125) for generating digital data representative of a voiced sound signal synchronously with said clock pulse; a digital filter circuit (1) for filter-processing the digital data supplied from said periodic sound signal generating means (100 to 102; 110 to 125) synchronously with said clock pulse in accordance with said synthesis parameters from said control circuit (5); and speech generating means (6 to 8) for generating the speech corresponding to the digital data from said digital filter circuit (1), characterized in that said periodic sound signal generating means comprises memory means (101; 125) for storing a predetermined number of sampling data corresponding to a predetermined number of sampling values within a predetermined time range of a continuous wave signal which is obtained by developing the voiced sound signal based on an interpolation function; and readout control means (100, 102; 110 to 124) for sequentially reading out the sampling data of the continuous wave signal within said predetermined time range that are synchronized with the pitch period represented by said input pitch data from said memory means (101; 125) in response to said clock pulse and for supplying said sampling data to said digital filter circuit (1).
Claim 2
Dependent Claim
228 words
A speech synthesizing apparatus comprising: a control circuit (5) for generating synthesis parameters, pitch data and clock pulses corresponding to speech to be synthesized; a periodic-sound-signal- generating means (100 to 102; 110 to 125) for generating digital data representative of a voiced sound signal synchronously with said clock pulse; a digital filter circuit (1) for filter-processing the digital data supplied from said periodic sound signal generating means (100 to 102; 110 to 125) synchronously with said clock pulse in accordance with said synthesis parameters from said control circuit (5); and speech generating means (6 to 8) for generating the speech corresponding to the digital data from said digital filter circuit (1), characterized in that said periodic sound signal generating means comprises memory means (101; 125) for storing a predetermined number of sampling data corresponding to a predetermined number of sampling values within a predetermined time range of a continuous wave signal which is obtained by developing the voiced sound signal based on an interpolation function; and readout control means (100, 102; 110 to 124) for sequentially reading out the sampling data of the continuous wave signal within said predetermined time range that are synchronized with the pitch period represented by said input pitch data from said memory means (101; 125) in response to said clock pulse and for supplying said sampling data to said digital filter circuit (1).
Claim 3
Dependent Claim
103 words
A speech synthesizing apparatus according to claim 1, characterized in that said readout control means comprises: a first memory (MRl) for storing deviation time data representative of the time between the start point of the pitch interval and a clock pulse which is generated simultaneously with or immediately after said start point of said pitch interval; and a data processing circuit (100, MR2) for sequentially reading out the sampling data at the sampling points corresponding to the sum of said deviation time data and the integer times the period of said clock pulse from said memory means (101) synchronously with said clock pulse.
Claim 4
Dependent Claim
85 words
A speech synthesizing apparatus according to claim 2, characterized in that said data processing circuit comprises: a second memory (MR2); and a data processing unit (100) for sequentially counting up the contents of said second memory (MR2) in response to the clock pulse which is generated simultaneously with or immediately after the start point of said pitch interval and for sequentially reading out the sampling data from said memory means (101) in response to the contents of said first and second memories (MRl and MR2).
Claim 5
Dependent Claim
81 words
A speech synthesizing apparatus according to claim 1, 2 or 3, characterized in that said readout control means (100, 102; 110 to 124) produces a selection signal according to a speech to be synthesized, and characterized by further comprising a random noise generator (2) and a sound selector (4) for permitting one of output signals from said memory means (101) and random noise generator (2) to be selectively transferred to said digital filter circuit (1) in accordance with the selection signal.
References Cited (Backward Citations)
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