Patent EP0144242A2 successfully refreshed from Google Patents.
EP0144242A2
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Compound semiconductor integrated circuit device
Assignee: Fujitsu Ltd
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Filing: 1984-12-05
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Granted: —
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Expires: 2004-12-05
Abstract
Abstract A compound semiconductor integrated circuit device includes a heterojunction bipolar transistor (B) which has three compound semiconductor layers (12, 13, 14) of alternate conductivity types, one of which layers (14) provides a channel region or a channel-electron-supplying region of a field effect transistor (F). In this way both bipolar transistors and FET transistors can be provided in one integrated circuit device.
Inventors
- 👤 Naoki Yokoyama
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-28 16:39
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/80; H10D62/83; H10D84/00; H10D84/01; H10D84/02; H10D84/05; H10D10/00; H10D10/80; H10D10/821; H10D30/00; H10D30/40; H10D30/47; H10D30/471; H10D30/475; H10D30/4755; H10D30/80; H10D30/801; H10D62/82; H10D62/824; H10D86/00; H10D86/01
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
175 words
A compound semiconductor integrated circuit device including a bipolar transistor and a field effect transistor (FET), said device comprising a substrate, a first compound semiconductor layer of one conductivity on the substrate, a second compound semiconductor layer of another conductivity on the first compound semiconductor layer, and a third compound semiconductor layer of the one conductivity on the second semiconductor layer, at least one of the first and third compound semiconductor layers having a forbidden energy band gap larger than that of the second compound semiconductor layer; said bipolar transistor comprising a base region of the second compound semiconductor layer, an emitter region of one of the first and third compound semiconductor layers which has a forbidden energy band gap larger than that of the second compound semiconductor layer on or above a first area of the substrate; and said FET comprising a channel region or a region for supplying electrons to a channel region of one of the first, second, and third compound semiconductor layers on or above a second area of the substrate.
Claim 2
Dependent Claim
175 words
A compound semiconductor integrated circuit device including a bipolar transistor and a field effect transistor (FET), said device comprising a substrate, a first compound semiconductor layer of one conductivity on the substrate, a second compound semiconductor layer of another conductivity on the first compound semiconductor layer, and a third compound semiconductor layer of the one conductivity on the second semiconductor layer, at least one of the first and third compound semiconductor layers having a forbidden energy band gap larger than that of the second compound semiconductor layer; said bipolar transistor comprising a base region of the second compound semiconductor layer, an emitter region of one of the first and third compound semiconductor layers which has a forbidden energy band gap larger than that of the second compound semiconductor layer on or above a first area of the substrate; and said FET comprising a channel region or a region for supplying electrons to a channel region of one of the first, second, and third compound semiconductor layers on or above a second area of the substrate.
Claim 3
Dependent Claim
36 words
A device according to claim 1, wherein said one conductivity is n-type, said other conductivity is p-type, and said third compound semiconductor layer of n-type in the second area is the channel region of the FET.
Claim 4
Dependent Claim
30 words
A device according to claim 2, wherein said first compound semiconductor layer is of Al x Ga 1-x As and said second and third compound semiconductor layers are of GaAs.
Claim 5
Dependent Claim
31 words
A device according to claim 2, wherein said first compound semiconductor layer is of Ga x In 1-x P As and said seccnd and third compound semiconductor layers are of InP.
Claim 6
Dependent Claim
37 words
A device according to claim 2, wherein said first compound semiconductor layer is of Ga x In 1-x p y As 1-y and said second and third compound semiconductor layers are of Al x In 1-x As.
Claim 7
Dependent Claim
36 words
A device according to claim 1, wherein said one conductivity is p-type, said other conductivity is n-type, and said second compound semiconductor layer of n-type in the second area is the channel region of the FET.
Claim 8
Dependent Claim
30 words
A device according to claim 6, wherein a gate electrode exists on said third compound semiconductor layer in said second area so that said FET is a junction-type FET (JFET).
Claim 9
Dependent Claim
43 words
A device according to claim 6, wherein said third compound semiconductor layer does not exist in the second area and a gate electrode exists on the second compound semiconductor layer in said second area so that said FET is a metal-semiconductor FET (MESFET).
Claim 10
Dependent Claim
33 words
A device according to claim 6, 7 or 8, wherein said first and third compound semiconductor layers are of Al x Ga 1-x As and said second compound semiconductor layer is of GaAs.
Claim 11
Dependent Claim
36 words
A device according to claim 6, 7 or 8,wherein said first and third compound semiconductor layers are of InP and said second compound semiconductor layer is of Ga x In 1-x P y As 1-y .
Claim 12
Dependent Claim
42 words
ll. A device according to claim 6, 7 or 8, wherein said first and third compound semiconductor layers are of In x Ga 1-x As and said second compound semiconductor layer is of Ga x In 1-x P y As 1-y .
Claim 13
Dependent Claim
88 words
A device according to claim 1, wherein a fourth compound semiconductor layer further exists under and adjacent to said first compound semiconductor layer in said first and second areas of the substrate, said fourth compound semiconductor layer having an electron affinity larger than that of said first compound semiconductor layer, said one conductivity is n-type, said other conductivity is p-type, and a two-dimensional electron gas made of electrons transmitted from said first compound semiconductor layer to said fourth compound semiconductor layer is the channel region of the FET.
Claim 14
Dependent Claim
40 words
A device according to claim 12, wherein said first ccmpcund semiconductor layer is of Al x Ga 1-x As and said second, third, and fourth compound semiconductor layers are of GaAs, said fourth compound semiconductor layer of GaAs being undoped.
Claim 15
Dependent Claim
51 words
A device according to claim 12, wherein said first compound semiconductor layer is of InP and said second, third, and fourth compound semiconductor layers are of Ga x In 1-x P y As 1-y , said fourth compound semiconductor layer of Ga x In 1-x P y AS 1-y being undoped.
Claim 16
Dependent Claim
53 words
A device according to claim 12, wherein said first compound semiconductor layer is of Al In- As and said second, third, and fourth compound semiconductor layers are of Ga x In 1-x P y As 1-y , said fourth compound semiconductor layer of Ga x In 1-x P y As 1-y being undoped.
References Cited (Backward Citations)
No citation records indexed.
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