Patent EP0141660A2 successfully refreshed from Google Patents.
EP0141660A2
Expired / Lapsed
EP
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Microcomputer
Assignee: Inmos Ltd
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Filing: 1984-11-02
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Granted: —
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Expires: 2004-11-02
Abstract
Abstract A microcomputer comprising memory 60 and a process is arranged to execute a plurality of concurrent processes and share its time between them. The microcomputer includes as register (51) for indicating a current process as well as a collection of processes awaiting execution. Each process has a memory location 66 to provide an indication of a next process in a linked list of processes. Each process has an allocated priority and a separate linked list is formed for each priority. A register (53) indicates the front of one list and a further register (52) indicates the end of that list.
Inventors
- 👤 Michael David May
- 👤 Roger Mark Shepherd
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 16:05
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/46; G06F9/48; G06F9/4806; G06F9/4843; G06F9/4881; G06F9/54
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
320 words
A microcomputer comprising memory and a processor arranged to execute a plurality of concurrent processes in accordance with a plurality of program steps, said program steps consisting of a plurality of instructions for sequential execution by the processor, each instruction including a set of function bits which designate a required function to be executed by the processor, wherein: (a) said processor comprises: (1) a plurality of registers and data transfer means for use in data transfers to and from said registers, (2) means for receiving each instruction and loading into one of the processor registers a value associated with that instruction and (3) control means for controlling said data transfer means and registers in response to said function bits to cause the processor to operate in accordance with said function bits, (b) the microcomputer includes scheduling means comprising: (1) means for indicating the current process which is being executed by the processor, (2) a program stage indicator for each concurrent process (3) means for indicating the allocated priority of each process, (4) means for identifying one or more processes of a first priority which form a first collection awaiting execution by the processor, (5) means for identifying one or more processes of a further priority which form a further collection awaiting execution by the processor, (6) means for adding a process to either of said collections in accordance with the priority of the process to be added, (7) next process indicator means for indicating the next process in each of said collections, and (c) the processor is operable to cease executinga current process and cause a further process to become the current process to share its processing time between a plurality of concurrent processes, said processor further including means responsive to the priority of each collection and to said next process indicator means so that the selection of the next process for execution is dependent on priority of the process.
Claim 2
Dependent Claim
320 words
A microcomputer comprising memory and a processor arranged to execute a plurality of concurrent processes in accordance with a plurality of program steps, said program steps consisting of a plurality of instructions for sequential execution by the processor, each instruction including a set of function bits which designate a required function to be executed by the processor, wherein: (a) said processor comprises: (1) a plurality of registers and data transfer means for use in data transfers to and from said registers, (2) means for receiving each instruction and loading into one of the processor registers a value associated with that instruction and (3) control means for controlling said data transfer means and registers in response to said function bits to cause the processor to operate in accordance with said function bits, (b) the microcomputer includes scheduling means comprising: (1) means for indicating the current process which is being executed by the processor, (2) a program stage indicator for each concurrent process (3) means for indicating the allocated priority of each process, (4) means for identifying one or more processes of a first priority which form a first collection awaiting execution by the processor, (5) means for identifying one or more processes of a further priority which form a further collection awaiting execution by the processor, (6) means for adding a process to either of said collections in accordance with the priority of the process to be added, (7) next process indicator means for indicating the next process in each of said collections, and (c) the processor is operable to cease executinga current process and cause a further process to become the current process to share its processing time between a plurality of concurrent processes, said processor further including means responsive to the priority of each collection and to said next process indicator means so that the selection of the next process for execution is dependent on priority of the process.
Claim 3
Dependent Claim
45 words
A microcomputer according to claim 1 further including means to test the priority of any processes awaiting execution and arranged to select of a high priority process if one is available as the next current process when the processor ceases to execute the current process.
Claim 4
Dependent Claim
60 words
A microcomputer according to claim 1 or claim 2 further including (a) means indicating the priority of the current process (b) means indicating the priority of a process awaiting rescheduling by the processor and (c) interrupt means responsive to thepriority indicators to cause interruption of execution of a lower priority process should a higher priority process become ready for scheduling.
Claim 5
Dependent Claim
61 words
A microcomputer according to any one of the preceding claims in which said memory provides for each process a workspace having a plurality of addressable locations including locations for recording variables associated with the process and in which one of said processor registers is arranged to hold a workspace pointer value identifying an address of the workspace of the current process.
Claim 6
Dependent Claim
58 words
A microcomputer according to Claim 4, in which said processor is arranged to respond to an instruction to cease executing a current process of one priority and commence executing a further process of the same priority, by replacing the workspace pointer value in said one of the processor registers by the workspace pointer value of the further process.
Claim 7
Dependent Claim
35 words
A microcomputer according to Claim 4 or Claim 5, in which the workspace of each process includes means for indicating the program stage for that process when that process next becomes the said current process.
Claim 8
Dependent Claim
72 words
A microcomputer according to any one of Claims 4 to 6, in which said workspace for each process includes means for holding a workspace pointer value for a subsequent process in the same connection, said means being used when one process is in the connection to indicate the nect process of that priority to be executed by the processor, thereby forming a linked list of processes of a designated priority awaiting execution.
Claim 9
Dependent Claim
28 words
A microcomputer according to Claim 7, wherein the workspaces of the processes are arranged to form a plurality of lists one list for each of the allocated priorities.
Claim 10
Dependent Claim
22 words
A microcomputer according to Claim 8, in which register means is provided to hold workspace pointers identifying the front of each list.
Claim 11
Dependent Claim
26 words
A microcomputer according to Claim 9, wherein further processor register means are arranged to hold workspace pointers identifying the process at the end of each list.
Claim 12
Dependent Claim
41 words
A microcomputer according to Claim 9 or Claim 10, wherein further processor register means are provided to hold the workspace pointer values of processes which have been executed by the processor as the current process and have not yet been descheduled.
Claim 13
Dependent Claim
43 words
A microcomputer according to Claim 11, including means for testing said further processor registers on termination of a high priority process to check whether a lower priority process has been a current process and interrupted by a high priority process prior to termination.
Claim 14
Dependent Claim
93 words
A microcomputer according to any one of the preceding claims including a plurality of communication channels each comprising a memory location for use in message transmission between concurrent processes, synchronising means for synchronising message transmission through said channels whereby data is transmi.tted from one process to another when both processes are at corresponding stages in their program sequences, and means to cause descheduling of a process when executing an instruction for the message transmission through one of said channels at a time when the other process has not reached a corresponding program stage.
Claim 15
Dependent Claim
59 words
A microcomputer according to Claim 13, including means operable to transfer a plurality of bytes of data to or from a memory location by use of a communication channel in response to a message instruction, said processor including means responsive to priority indicator means to interrupt said message transmission if a process of higher priority becomes ready for scheduling.
Claim 16
Dependent Claim
109 words
A microcomputer according to Claim 4, including (i) means for holding a pointer to the workspace of the current process (ii) means for holding pointer values to the workspaces of processes at the front and back of a high priority list of processes awaiting execution (iii) means for holding pointer values to the workspaces of processes at the front and back of a low priority list of processes awaiting execution (iv) means for indicating the priority of the current process (v) means for indicating the priority of any process awaiting scheduling by the processor (vi) means for holding a pointer to the workspace of any such process awaiting scheduling.
Claim 17
Independent Claim
65 words
A method of scheduling execution of a plurality of concurrent processes by a microcomputer wherein processes awaiting execution by the processor are identified and added to one of a plurality of lists depending on the priority of the process and remove therefrom for execution by the processor in accordance with the priority of the process, whereby the processor shares its time between the concurrent processes.
Claim 18
Independent Claim
65 words
A method of scheduling execution of a plurality of concurrent processes by a microcomputer wherein processes awaiting execution by the processor are identified and added to one of a plurality of lists depending on the priority of the process and remove therefrom for execution by the processor in accordance with the priority of the process, whereby the processor shares its time between the concurrent processes.
References Cited (Backward Citations)
No citation records indexed.
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