Patent EP0133789A2 successfully refreshed from Google Patents.
EP0133789A2
Expired / Lapsed
EP
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Electronic switch
Assignee: British Telecommunications PLC
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Filing: 1984-07-30
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Granted: —
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Expires: 2004-07-30
Abstract
Abstract A switch transistor (V1) has a controlled path connected in a circuit (P-Q) to be switched, and Control signals are supplied (ID) to its control electrode to switch it on. If, in the ON state the potential difference across the switch exceeds a threshold value, trip means (T1) are actuated to turn the switch transistor off. To prevent premature tripping, delay means R2, C3 disable the trip means (by holding off T3) for a short period following switch on, but is arranged so as not to delay the trip action once that period has expired.
Inventors
- 👤 David Christopher Croft
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-01 06:13
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/08; H03K17/082; H03K17/0822
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
112 words
A switch comprising a switch transistor having a controlled path for connection in a circuit to be switched, means for supplying control signals to a control electrode thereof to render the controlled path conductive, and trip means actuable by the potential difference across the controlled path exceeding a threshold value to render the transistor non-conducting, the trip means being arranged in operation to receive the said control signals via delay means and the said potential difference without substantial delay, so as to permit operation of the trip means only after the expiration of a predetermined delay period following application of the said control signals to the control electrode of the switch transistor.
Claim 2
Dependent Claim
112 words
A switch comprising a switch transistor having a controlled path for connection in a circuit to be switched, means for supplying control signals to a control electrode thereof to render the controlled path conductive, and trip means actuable by the potential difference across the controlled path exceeding a threshold value to render the transistor non-conducting, the trip means being arranged in operation to receive the said control signals via delay means and the said potential difference without substantial delay, so as to permit operation of the trip means only after the expiration of a predetermined delay period following application of the said control signals to the control electrode of the switch transistor.
Claim 3
Dependent Claim
38 words
A switch according to Claim 1 including control means arranged in operation to permit the switch transistor to be rendered at least partially conductive at the expiration of a predetermined delay period following actuation of the trip means.
Claim 4
Dependent Claim
60 words
A switch according to Claim 1 or 2 in which the switch transistor is a field effect transistor and the trip means comprises a second field effect transistor with its source-drain path connected in a bypass path between the gate and source of the switch field effect transistor, and its gate electrode connected to the drain of the switch transistor.
Claim 5
Dependent Claim
15 words
A switch according to Claim 3 in which the switch transistor is an MOS transistor.
Claim 6
Dependent Claim
52 words
A switch according to Claim 3 or 4 when dependent on Claim 2 in which the control means is a third field effect transistor with its gate supplied via an RC delay element from the gate circuit of the first transistor and arranged, when rendered non-conductive, to open the said bypass path.
Claim 7
Dependent Claim
22 words
A switch according to Claim 5 in which the source-drain path of the third transistor is connected in the said bypass path.
Claim 8
Dependent Claim
31 words
A switch according to Claim 5 in which the gate of the second transistor is connected to the drain of the switch transistor via the source-drain path of the third transistor.
Claim 9
Dependent Claim
46 words
A switch according to Claim 7, the control means including a current-limiting resistance connected between the drain of the switch transistor and the source-drain path of the third transistor, and a fourth transistor, connected in a voltage-limiting configuration, connected to the gate of the second transistor.
Claim 10
Dependent Claim
26 words
A switch according to any one of the preceding Claims including a pair of said switch transistors connected in reverse series, each with respective trip means.
References Cited (Backward Citations)
No citation records indexed.
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