Patent EP0131349A1 successfully refreshed from Google Patents.
EP0131349A1
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Circuit testing utilizing data compression and derivative mode vectors
Assignee: HP Inc
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Filing: 1984-03-07
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Granted: —
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Expires: 2004-03-07
Abstract
Abstract A circuit tester and test method are described that compress the amount of data stored in local test data RAMS (13) for the implementation of a circuit test, thereby reducing the amount of data that must be downloaded to the local test data RAMs (13), thereby improving test throughput. Derivative data vectors are utilized in addition to raw data vectors as part of the data compression technique. Further compression results from storing only unique data vectors in the local test data RAMs (13) and utlizing a sequencer (16) to control the order in which the unique data vectors are utilized. The sequencer includes test program logic (15,17) and logic capable of implementing on test pins indirect counters (19).
Inventors
- 👤 William A. Groves
- 👤 Matthew Lee Snook
- 👤 Rodney Browen
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-24 20:30
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/3183; G01R31/318335; G01R31/2832; G01R31/2834; G01R31/31712; G01R31/31713; G01R31/318371; G01R31/319; G01R31/31917; G01R31/31919; G01R31/31921; G01R31/3193; G01R31/31935
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
23 words
A circuit tester characterized by: a set of test pins (11), and driver means (12) for applying derivative data to the test pins.
Claim 2
Dependent Claim
23 words
A circuit tester characterized by: a set of test pins (11), and driver means (12) for applying derivative data to the test pins.
Claim 3
Dependent Claim
23 words
A circuit tester according to claim 1 characterized in that said driver means includes means for. applying raw data to the test pins.
Claim 4
Dependent Claim
25 words
A circuit tester according to claim 2 characterized in that said driver means can select between derivative data and raw data on a pin-by-pin basis.
Claim 5
Dependent Claim
48 words
A circuit tester according to claim 2 and further characterized by: local test data memory (13) connected to the driver means for storing data vectors, said driver means being responsive to data vectors stored in said local test data memory to produce test vectors on the test pins.
Claim 6
Dependent Claim
93 words
A circuit tester characterized by: a set of test pins (11), driver means (12) for applying test signals to the test pins, local test data memory (13) connected to the driver means for storing data vectors, said driver means being responsive to data vectors stored in said local test data memory, and a sequencer (16) for controlling the sequence in which the driver means is responsive to data vectors stored in the local test data memory, whereby each data vector is executed by the driver menas in the sequence determined by the sequencer.
Claim 7
Dependent Claim
93 words
A circuit tester characterized by: a set of test pins (11), driver means (12) for applying test signals to the test pins, local test data memory (13) connected to the driver means for storing data vectors, said driver means being responsive to data vectors stored in said local test data memory, and a sequencer (16) for controlling the sequence in which the driver means is responsive to data vectors stored in the local test data memory, whereby each data vector is executed by the driver menas in the sequence determined by the sequencer.
Claim 8
Dependent Claim
20 words
A circuit tester according to claim 5 characterized in that said local test data memory contains only unique data vectors.
Claim 9
Dependent Claim
23 words
A circuit tester according to claim 6 characterized in that the driver means includes means for applying derivative data to the test pins.
Claim 10
Dependent Claim
20 words
A circuit tester according to claim 7 characterized in that the driver means further includes means for applying raw data.
Claim 11
Dependent Claim
71 words
A circuit tester according to any one of claims 5 to 8 characterized in that each data vector is stored in a location having an associated data vector address, in that the sequencer is capable of sending data addresses to the local test data memory, and in that the driver means responds to a selected data vector when the address of that vector is received by the local test data memory.
Claim 12
Dependent Claim
66 words
A circuit tester according to claim 9 characterized in that the sequencer (16) comprises: a sequencer memory in which the addresses of data vectors are stored in the order in which the data vectors are to be accessed; and means (14) for sending the data vector addresses to the local test data memory in the order in which these addresses are stored in the sequencer memory.
Claim 13
Dependent Claim
34 words
A circuit tester according to claim 5 characterized in that the sequencer (16) comprises program logic means (15) for storing a test program and for sequencing data vectors in accordance with the test program.
Claim 14
Dependent Claim
21 words
A circuit tester according to claim 11 characterized in that said local test data memory (13) contains only unique data vectors.
Claim 15
Dependent Claim
19 words
A circuit tester according to claim 11 further characterized by means for generating indirect counters on the test pins.
Claim 16
Independent Claim
99 words
A method of testing circuits in which a set of test vectors are applied to a set of test pins connected to a first set of selected nodes of a device under test and resulting signals on a second set of selected nodes are monitored to test the operation of the device under test, the method being characterized by the steps of: applying the test vectors in response to a sequence of data test vectors stored in a local test data memory; and utilizing both derivative data vectors and raw data vectors in the application of the test vectors.
Claim 17
Independent Claim
99 words
A method of testing circuits in which a set of test vectors are applied to a set of test pins connected to a first set of selected nodes of a device under test and resulting signals on a second set of selected nodes are monitored to test the operation of the device under test, the method being characterized by the steps of: applying the test vectors in response to a sequence of data test vectors stored in a local test data memory; and utilizing both derivative data vectors and raw data vectors in the application of the test vectors.
Claim 18
Dependent Claim
89 words
A method according to claim 14 further characterized by, before the step of applying the test vectors, the steps of: analyzing the data vectors utilized in a given test to determine whether the number of data vectors required for the test can be reduced by selective use of derivative data vectors and raw data vectors; and using a combination of derivative and raw data vectors that reduces the number of data vectors required for a given test compared to the number required if only raw data vectors are utilized.
References Cited (Backward Citations)
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