EP0130508A1
Expired / Lapsed
EP
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Field effect transistor of the vertical MOS type
Assignee: Nissan Motor Co Ltd
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Filing: 1984-06-22
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Granted: —
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Expires: 2004-06-22
Abstract
Abstract A vertical MOS transistor comprises a first well region on an upper side of a semiconductor substrate, a second well region of a conductivity opposite to that of the first well region, which is provided within the first well region. Both well regions are formed by a double diffusion through the same diffusion window designed so that each angle formed by two adjacent sides is 150° or more. For instance, a 12-sided polygon 18- sided polygon or a circle is used for the diffusion window. Thus, it is easily possible to a vertical MOS transistor having low on-voltage and on-resistance, and high switching capability.
Inventors
- 👤 Tamotsu Tominaga
- 👤 Teruyoshi Mihara
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 20:56
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/028; H10D30/0291; H10D30/60; H10D30/64; H10D30/66; H10D30/665; H10D62/00; H10D62/10; H10D62/124; H10D62/126; H10D62/127; H10D62/17; H10D62/393; H10D62/102; H10D62/112; H10D64/00; H10D64/111
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
139 words
A field effect transistor of the vertical MOS type comprising: a semiconductor substrate of a first conductivity type; with a first electrode formed lower surface thereof; a first well region of a second conductivity type oppopsite to said first conductivity type provided on the upper side of said semiconductor substrate and functioning as a channel region; a second well region of a first conductivity type provided within said first well region with a second electrode formed theron; and a gate electrode arranged on said first well region through an insulation film, said gate electrode extending over said semiconductor substrate of said first conductivity type and said second well region; said both well regions being formed by a double diffusion through the same polygonal diffusion window designed so that each angle formed by two adjacent sides is 150° or more.
Claim 2
Dependent Claim
139 words
A field effect transistor of the vertical MOS type comprising: a semiconductor substrate of a first conductivity type; with a first electrode formed lower surface thereof; a first well region of a second conductivity type oppopsite to said first conductivity type provided on the upper side of said semiconductor substrate and functioning as a channel region; a second well region of a first conductivity type provided within said first well region with a second electrode formed theron; and a gate electrode arranged on said first well region through an insulation film, said gate electrode extending over said semiconductor substrate of said first conductivity type and said second well region; said both well regions being formed by a double diffusion through the same polygonal diffusion window designed so that each angle formed by two adjacent sides is 150° or more.
Claim 3
Dependent Claim
119 words
A field effect transistor of the vertical MOS type comprising: a semiconductor substrate of a first conductivity type; a first well region of a second conductivity type opposite to said first conductivity type provided on the upper side of said semiconductor substrate and functioning as a channel region; a second well region of a first conductivity type provided within said first well region with a second electrtode formed thereon; and i a gate electrode arranged on said first well region through an insulating film, said gate electrode extending over said semiconductor substrate of said first conductivity type and said second well region; said both well regions being formed by a double i diffusion through the same circular diffusion window.
Claim 4
Dependent Claim
119 words
A field effect transistor of the vertical MOS type comprising: a semiconductor substrate of a first conductivity type; a first well region of a second conductivity type opposite to said first conductivity type provided on the upper side of said semiconductor substrate and functioning as a channel region; a second well region of a first conductivity type provided within said first well region with a second electrtode formed thereon; and i a gate electrode arranged on said first well region through an insulating film, said gate electrode extending over said semiconductor substrate of said first conductivity type and said second well region; said both well regions being formed by a double i diffusion through the same circular diffusion window.
Claim 5
Dependent Claim
33 words
A field effect transistor of the vertical MOS type of Claim 1, wherein said polygonal diffusion window is an aperture opened in said gate electrode functioning also as resist for said double diffusion.
Claim 6
Dependent Claim
33 words
A field effect transistor of the vertical MOS type of Claim 2, wherein said circular diffusion window is an aperture opened in said gate electrode functioning also as resist for said double diffusion.
Claim 7
Dependent Claim
42 words
A field effect transistor of the vertical MOS type of Claim 1, wherein said first electrode functions as a drain electrode; said semiconductor substrate, as drain region; said second electrode, as a source electrode; said second well region, as a source region.
Claim 8
Dependent Claim
42 words
A field effect transistor of the vertical MOS type of Claim 2, wherein said first elctrode functions as a drain electrode; said semiconductor substrate, as drain region; said second electrode, as a source electrode; said second well region, as a source region.
Claim 9
Dependent Claim
20 words
A field effect transistor of the vertical MOS type of Claim 2, wherein said semiconductor substrate is a silicon wafer.
Claim 10
Dependent Claim
20 words
A field effect transistor of the vertical MOS type of Claim 3, wherein said semiconductor substrate is a silicon wafer.
Claim 11
Dependent Claim
38 words
A field effect transistor of the vertical MOS type of Claim 7, wherein said semiconductor substrate is provided with an epitaxial layer on the upper side thereof, and said both well region are formed in said epitaxial layer.
Claim 12
Dependent Claim
38 words
A field effect transistor of the vertical MOS type of Claim 8, wherein said semiconductor substrate is provided with an epitaxial layer on the upper side thereof, and said both well regions are formed in said epitaxial layer.
Claim 13
Dependent Claim
40 words
A field effect transistor of the vertical MOS type of Claim 9 furthur comprising a contact region of said second conductivity type formed in a central portion of said source region and being in contact with said first well region.
Claim 14
Dependent Claim
40 words
A field effect transistor of the vertical MOS type of Claim 10 furthur comprising a contact region of said second conductivity type formed in a central portion of said source region and being in contact with said first well region.
References Cited (Backward Citations)
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