Patent EP0130384A1 successfully refreshed from Google Patents.
EP0130384A1
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EP
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A two phase voltage signal generating circuit
Assignee: Sony Corp
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Filing: 1984-05-30
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Granted: —
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Expires: 2004-05-30
Abstract
Abstract A two phase voltage signal generating circuit for generating a pair of trapezoidal wave signals of phases opposite to each other is disclosed which includes an input terminal (S1) supplied with an input pulse signal, a capacitor (32), a pair of voltage limiting circuits (39) connected to both ends of the capacitor (32) respectively and for limiting the voltage at each end of the capacitor (32) within a predetermined voltage range, a current control circuit (33) controlled by the input pulse signal and for supplying a charge or discharge current to the capacitor (32) to generate the pair of trapezoidal wave voltage signals (V 1 , V 2 ) at the both ends of the capacitor (32), a detecting circuit (R1, R2, 57, 58) for detecting the change of the intermediate voltage of the trapezoidal wave voltage signals (V 1 , V 2 ) and a symmetry control circuit (45, 52) controlled by an output (P,,) of the detecting circuit (R1, R2, 57, 58) and for controlling the charge or discharge current such that the pair of trapezoidal wave voltage signals becomes substantially symmetrical to each other.
Inventors
- 👤 Fumio Ishikawa
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-06 18:06
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/15; H03K5/151; H03K4/00; H03K4/94
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
168 words
A two phase voltage signal generating circuit for generating a pair of trapezoidal wave signals of phases opposite to each other, characterized in: (A) an input terminal (S1) supplied with an input pulse signal; (B) a capacitor (32); (C) a pair of voltage limiting circuits (39) connected to both ends of said capacitor respectively and for limiting the voltage at each end of said capacitor within a predetermined voltage range; (D) a current control circuit (33) controlled by said input pulse signal and for supplying a charge or discharge current to said capacitor (32) to generate said pair of trapezoidal wave voltage signals at the both ends of said capacitor (32); (E) a detecting circuit for detecting the change of the intermediate voltage of said pair of trapezoidal wave voltage signals; and (F) a symmetry-control circuit (42) controlled by an output of said detecting circuit and for controlling said charge or discharge current such that said pair of trapezoidal wave voltage signals become substantially symmetrical to each other.
Claim 2
Dependent Claim
168 words
A two phase voltage signal generating circuit for generating a pair of trapezoidal wave signals of phases opposite to each other, characterized in: (A) an input terminal (S1) supplied with an input pulse signal; (B) a capacitor (32); (C) a pair of voltage limiting circuits (39) connected to both ends of said capacitor respectively and for limiting the voltage at each end of said capacitor within a predetermined voltage range; (D) a current control circuit (33) controlled by said input pulse signal and for supplying a charge or discharge current to said capacitor (32) to generate said pair of trapezoidal wave voltage signals at the both ends of said capacitor (32); (E) a detecting circuit for detecting the change of the intermediate voltage of said pair of trapezoidal wave voltage signals; and (F) a symmetry-control circuit (42) controlled by an output of said detecting circuit and for controlling said charge or discharge current such that said pair of trapezoidal wave voltage signals become substantially symmetrical to each other.
Claim 3
Dependent Claim
66 words
A two phase voltage signal generating circuit according to claim 1,characterized in that each of said voltage limiting circuits (39) includes a pair of diodes (D11, D12, D13, D14) serially connected.between a pair of voltage sources (40, 41) which determine said predetermined voltage range, and the connection points of said pair of diodes (D11, D12, D13, D14) are connected to the ends of said capacitor (32).
Claim 4
Dependent Claim
57 words
A two phase voltage signal generating circuit according to claim 1 or 2, characterized in that said detecting circuit includes a resistor(R 1 , R 2 ) connected between the both ends of said capacitor (32) and the intermediate point (P 11 ) of said resistor (R1, R 2 ) is the output of said detecting circuit.
Claim 5
Dependent Claim
61 words
A two phase voltage signal generating circuit according to claim 3, wherein said detecting circuit further includes a pair of capacitors (57, 58) serially connected across said resistor (R 1 , R 2 ) and the connection point between said capacitors (57, 58) is connected to the intermediate point (P 11 ) of said resistor (R 1 , R 2 ).
Claim 6
Dependent Claim
70 words
A two phase voltage signal generating circuit according to claim 3 or 4, characterized in that said symmetry control circuit includes a pair of controllable current sources (45, 52) connected to the both ends of said capacitor (32) respectively, and said pair of controllable current sources (45, 52) are controlled by the voltage of said intermediate point (P 11 ) of said resistor (R 1 , R 2 ) .
Claim 7
Dependent Claim
101 words
A two phase voltage signal generating circuit according to claim 5, characterized in that said controllable current sources include first and second transistors (T 11 , T12), the bases of said first and second transistors being commonly connected to said intermediate point (P 11 ) of said resistor, the emitters of said first and second transistors being commonly connected to an emitter of a third transistor (T 13 ), the base of which is connected to a reference voltage source (49), and the collectors of said first and second transistors being connected to the both ends of said capacitor (32) respectively.
Claim 8
Dependent Claim
80 words
A two phase voltage signal generating circuit according to one of claims1-6, characterized in that said current control circuit includes first and second differential circuits, collectors of first transistors (T 1 , T 3 ) of said first and second differential circuits being commonly connected to one end of said capacitor (32), and collectors of second transistors (T 2 , T 4 ) of said first and second differential circuits being commonly connected to another end of said capacitor (32).
References Cited (Backward Citations)
US3577138A
Cited
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