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EP0125666A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

An improved method of manufacturing flat panel backplanes, display transistors and displays made thereby

Assignee: Honeywell Inc
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Filing: 1984-05-11
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Granted: —
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Expires: 2004-05-11
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Abstract

Abstract An improved method of manufacturing active matrix display backplanes with thin film transistors thereon and a drive scheme therefor. A refractory metal covers the indium tin oxide (ITO) layer, patterned to form a gate electrode for the transistors and to protect the pixel pad ITO during formation of the transistors. To reduce shorts and capacitance between the gate and the source or the drain, an intermetal dielectric is patterned to form a central portion over a planar portion of the gate region and to cover any exposed gate edges.

Inventors

  • 👤 Scott H. Holmberg
  • 👤 Richard A. Flasck

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-25 23:33
CPC Classifications
G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/136; G02F1/1362; G02F1/1368; H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6729; H10D30/673; H10D30/6732; H10D30/6737; H10D30/6739; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6746; H10D86/00; H10D86/40; H10D86/441; H10D86/60; G02F1/136259; G02F1/136268; G02F2202/00; G02F2202/10; G02F2202/103

Claims Analysis

Total Claims: 68
Claim 1
Independent Claim 57 words
A method of manufacturing matrix display backplanes comprising: providing a glass substrate with a conductive oxide layer on said insulator layer; depositing a refractory metal layer on said conductive oxide layer prior to subsequent processing steps; and processing the substrate and layers to form the matrix transistors with said refractory metal layer protecting said conductive oxide layer.
Claim 2
Independent Claim 57 words
A method of manufacturing matrix display backplanes comprising: providing a glass substrate with a conductive oxide layer on said insulator layer; depositing a refractory metal layer on said conductive oxide layer prior to subsequent processing steps; and processing the substrate and layers to form the matrix transistors with said refractory metal layer protecting said conductive oxide layer.
Claim 3
Dependent Claim 27 words
The method as claimed in claim 1, further including: removing portions of said refractory metal and said conductive oxide layers to form at least one gate electrode.
Claim 4
Dependent Claim 23 words
The method as claimed in claim 2, further including: depositing a gate insulator layer and a semiconductor layer successively onto said gate electrode.
Claim 5
Dependent Claim 19 words
The method as claimed in claim 3 wherein: depositing said semiconductor layer includes plasma depositing an amorphous silicon alloy.
Claim 6
Dependent Claim 38 words
The method as claimed in claim 3 further including: depositing an intermediate dielectric layer over said gate electrode, said gate insulator and said semiconductor layers; and removing a central portion of said dielectric layer from said semiconductor layer.
Claim 7
Dependent Claim 28 words
The method as claimed in claim 5 further including: depositing the source and drain electrodes over said semiconductor layer; and forming a passivating layer over said transistor layers.
Claim 8
Dependent Claim 27 words
The method as claimed in claim 6 further including: removing the refractory metal layer from said oxide layer adjacent said transistor layers to form pixel contact pads.
Claim 9
Dependent Claim 25 words
The method as claimed in claim 1 including: depositing said insulator layer on said substrate; and depositing said conductive oxide layer on said insulating layer.
Claim 10
Dependent Claim 50 words
The method as claimed in claim 2 further including: removing portions of said refractory metal and said conductive oxide layer to form a plurality of gate electrodes, gate contact pads, pixel pads and source contact pads with each of said gate electrodes coupled to one of said gate contact pads.
Claim 11
Dependent Claim 31 words
The method as claimed in claim 2 further including: depositing an intermetal dielectric layer over said gate electrode; and removing a central portion of said dielectric layer from said gate electrode.
Claim 12
Dependent Claim 22 words
The method as claimed in claim 10 further including: depositing a gate insulator and a semiconductor layer successively onto said gate electrode.
Claim 13
Dependent Claim 19 words
The method as claimed in claim 11 wherein: depositing said semiconductor layer includes plasma depositing an amorphous silicon alloy.
Claim 14
Dependent Claim 28 words
The method as claimed in claim 11 further including: depositing the source and drain electrodes over said semiconductor layer; and forming a passivating layer over said transistor layers.
Claim 15
Dependent Claim 28 words
The method as claimed in claim 13 further including: removing the refractory metal layer from said conductive oxide layer adjacent said transistor layers to form pixel contact pads.
Claim 16
Independent Claim 71 words
A method of manufacturing matrix display backplanes comprising: providing a substrate; depositing a gate electrode on said substrate having at least one exposed edge; depositing a gate insulator on said gate electrode; depositing a semiconductor material on said insulator; depositing an intermetal dielectric adjacent said edge of said gate electrode; and depositing a drain electrode onto at least a portion of said intermetal dielectric adjacent said edge of said gate electrode.
Claim 17
Independent Claim 71 words
A method of manufacturing matrix display backplanes comprising: providing a substrate; depositing a gate electrode on said substrate having at least one exposed edge; depositing a gate insulator on said gate electrode; depositing a semiconductor material on said insulator; depositing an intermetal dielectric adjacent said edge of said gate electrode; and depositing a drain electrode onto at least a portion of said intermetal dielectric adjacent said edge of said gate electrode.
Claim 18
Dependent Claim 77 words
The method as claimed in claim 15 including: depositing said gate insulator to substantially cover said gate electrode and depositing said semiconductor material to substantially cover said gate insulator; depositing said intermetal dielectric over said gate electrode, said insulator and said semiconductor material; removing a central portion of said intermetal dielectric to expose a substantially planar portion of said semiconductor material prior to depositing said drain electrode; and depositing a source electrode concurrently with said drain electrode.
Claim 19
Dependent Claim 26 words
The method as claimed in claim 16 wherein: providing said substrate includes providing a glass substrate; and depositing a conductive oxide layer on said insulator layer.
Claim 20
Dependent Claim 40 words
The method as claimed in claim 17 wherein: depositing said gate electrode includes depositing a refractory metal layer on said conductive oxide layer; and removing portions of said refractory metal and said conductive oxide layer to form said gate electrode.
Claim 21
Dependent Claim 50 words
The method as claimed in claim 18 further including: removing portions of said refractory metal and said conductive oxide layer to form a plurality of gate electrodes, gate contact pads, pixel pads and source contact pads with each of said gate electrodes coupled to one of said gate contact pads.
Claim 22
Dependent Claim 34 words
The method as claimed in claim 18 including: depositing a passivating layer over said transistor elements; and removing said refractory metal from said conductive layer adjacent said transistor elements to form pixel contact pads.
Claim 23
Dependent Claim 19 words
The method as claimed in claim 15 wherein: depositing said semiconductor material includes plasma depositing an amorphous silicon alloy.
Claim 24
Dependent Claim 54 words
The method as claimed in claim 15 including: depositing said intermetal dielectric to cover said gate electrode; removing a central portion of said dielectric to expose a substantially planar portion of said gate electrode prior to depositing said insulator and said semiconductor material thereon; and depositing a source electrode concurrently with said drain electrode.
Claim 25
Dependent Claim 26 words
The method as claimed in claim 22 wherein: providing said substrate includes providing a glass substrate; and depositing a conductive oxide layer on said insulator layer.
Claim 26
Dependent Claim 40 words
The method as claimed in claim 23 wherein: depositing said gate electrode includes depositing a refractory metal layer on said conductive oxide layer; and removing portions of said refractory metal and said conductive oxide layer to form said gate electrode.
Claim 27
Dependent Claim 35 words
The method as claimed in claim 24 including: depositing a passivating layer over said transistor elements; and removing said refractory metal from said conductive oxide layer adjacent said transistor elements to form pixel contact pads.
Claim 28
Dependent Claim 18 words
The method as claimed in claim 25 wherein: depositing said semiconductor material includes plasma depositing amorphous silicon alloy.
Claim 29
Dependent Claim 73 words
A matrix display backplane comprising: a glass substrate having in successive layers, a conductive oxide layer and a refractory metal layer; portions of said refractory metal and said conductive oxide layer patterned to form a plurality of gate electrodes, gate contact pads, pixel pads and source contact pads with each of said gate electrodes coupled to one of said gate contact pads; and a plurality of matrix transistors formed on said gate electrodes.
Claim 30
Dependent Claim 73 words
A matrix display backplane comprising: a glass substrate having in successive layers, a conductive oxide layer and a refractory metal layer; portions of said refractory metal and said conductive oxide layer patterned to form a plurality of gate electrodes, gate contact pads, pixel pads and source contact pads with each of said gate electrodes coupled to one of said gate contact pads; and a plurality of matrix transistors formed on said gate electrodes.
Claim 31
Dependent Claim 36 words
The backplane as defined in claim 27 including: said gate electrodes having at least one exposed edge; and an intermetal dielectric layer covering said exposed edge and having a central open portion on said gate electrode.
Claim 32
Dependent Claim 43 words
The backplane as defined in claim 28 including: said central open portion having in successive layers, a gate insulator and a semiconductor material; a drain electrode and a source electrode formed on said semiconductor layer; and a passivation layer covering the transistor layers.
Claim 33
Dependent Claim 18 words
The backplane as defined in claim 29 including: said semiconductor layer being formed of an amorphous silicon alloy.
Claim 34
Dependent Claim 83 words
The backplane as defined in claim 29 wherein: said gate electrodes are formed in a plurality of lines, each line connected to a respective gate contact pad and each line having a plurality of transistors formed thereon; said drain electrodes connecting each of said transistors to one of said pixel pads; and said source electrodes are formed in lines spaced from said gate electrodes, and connected to said source contact pads, with each of said transistors coupled to one of said source electrodes.
Claim 35
Dependent Claim 23 words
The backplane as defined in claim 27 wherein: said refractory metal is removed from said pixel pads to expose said conductive oxide layer.
Claim 36
Dependent Claim 54 words
The backplane as defined in claim 27 wherein: said gate electrodes have in successive layers a gate insulator and a semiconductor material; and an intermetal dielectric layer covering said gate electrode, gate insulator and semiconductor material including any exposed edges thereof and said dielectric layer having a central open portion on said semiconductor layer.
Claim 37
Dependent Claim 33 words
The backplane as defined in claim 33 wherein: said central open portion has a drain electrode and a source electrode formed on said semiconductor layer; and a passivation layer covering the transistor layers.
Claim 38
Dependent Claim 18 words
The backplane as defined in claim 34 wherein: said semiconductor layer is formed of an amorphous silicon alloy.
Claim 39
Dependent Claim 83 words
The backplane as defined in claim 34 wherein: said gate electrodes are formed in a plurality of lines, each line connected to a respective gate contact pad and each line having a plurality of transistors formed thereon; said drain electrodes connecting each of said transistors to one of said pixel pads; and said source electrodes are formed in lines spaced from said gate electrodes, and connected to said source contact pads, with each of said transistors coupled to one of said source electrodes.
Claim 40
Dependent Claim 73 words
A matrix display backplane comprising: a substrate; a plurality of gate electrodes on said substrate, each of said electrodes having at least one exposed edge; an intermetal dielectric adjacent said exposed edge; and a plurality of transistors formed on said gate electrodes, each of said transistors having a source electrode and a drain electrode with said intermetal dielectric being between at least one of said source and drain electrodes and said exposed edge.
Claim 41
Dependent Claim 73 words
A matrix display backplane comprising: a substrate; a plurality of gate electrodes on said substrate, each of said electrodes having at least one exposed edge; an intermetal dielectric adjacent said exposed edge; and a plurality of transistors formed on said gate electrodes, each of said transistors having a source electrode and a drain electrode with said intermetal dielectric being between at least one of said source and drain electrodes and said exposed edge.
Claim 42
Dependent Claim 35 words
The backplane as defined in claim 37 including: said gate electrodes having at least two exposed edges; and said intermetal dielectric covering said exposed edges and having a central open portion on said gate electrode.
Claim 43
Dependent Claim 43 words
The backplane as defined in claim 38 including: said central open portion having in successive layers, a gate insulator and a semiconductor material; said drain electrode and said source electrode formed on said semiconductor layer; and a passivation layer covering the transistor layers.
Claim 44
Dependent Claim 18 words
The backplane as defined in claim 39 including: said semiconductor layer being formed of an amorphous silicon alloy.
Claim 45
Dependent Claim 82 words
The backplane as defined in claim 39 wherein: said gate electrodes are formed in a plurality of lines, each line connected to a respective gate contact pad and each line having a plurality of transistors formed thereon; said drain electrodes connecting each of said transistors to a pixel pad; and said source electrodes are formed in lines spaced from said gate electrodes, and connected to a respective source contact pad, with each of said transistors coupled to one of said source electrodes.
Claim 46
Dependent Claim 35 words
The backplane as defined in claim 37 wherein: said substrate is glass having in successive layers, a conductive oxide layer and a refractory metal layer; and said gate electrodes are formed from said successive layers.
Claim 47
Dependent Claim 54 words
The backplane as defined in claim 37 wherein: said gate electrodes have in successive layers a gate insulator and a semiconductor material; and said intermetal dielectric layer covering said gate electrode, gate insulator and semiconductor material including any exposed edges thereof and said dielectric layer having a central open portion on said semiconductor layer.
Claim 48
Dependent Claim 33 words
The backplane as defined in claim 43 wherein: said central open portion has said drain electrode and said source electrode formed on said semiconductor layer; and a passivation layer covering the transistor layers.
Claim 49
Dependent Claim 18 words
The backplane as defined in claim 44 wherein: said semiconductor layer is formed of an amorphous silicon alloy.
Claim 50
Dependent Claim 82 words
The backplane as defined in claim 44 wherein: said gate electrodes are formed in a plurality of lines, each line connected to a respective gate contact pad and each line having a plurality of transistors formed thereon; said drain electrodes connecting each of said transistors to a pixel pad; and said source electrodes are formed in lines spaced from said gate electrodes, and connected to a respective source contact pad, with each of said transistors coupled to one of said source electrodes.
Claim 51
Independent Claim 100 words
A method of driving a thin film transistor active matrix, including a frontplane, a plurality of pixels and a plurality of gate and source lines, comprising: holding each non-selected gate line at a first voltage; applying a voltage of opposite polarity to said first voltage on each gate line coupled to a pixel to be activated; applying at least a second voltage to the frontplane; applying at least a third voltage to each source line coupled to the pixels to be activated; and alternating at least one of said frontplane and each said source line voltages with a fourth voltage.
Claim 52
Independent Claim 100 words
A method of driving a thin film transistor active matrix, including a frontplane, a plurality of pixels and a plurality of gate and source lines, comprising: holding each non-selected gate line at a first voltage; applying a voltage of opposite polarity to said first voltage on each gate line coupled to a pixel to be activated; applying at least a second voltage to the frontplane; applying at least a third voltage to each source line coupled to the pixels to be activated; and alternating at least one of said frontplane and each said source line voltages with a fourth voltage.
Claim 53
Dependent Claim 23 words
The method as defined in claim 47 including: alternating both of said frontplane and each said source line voltages, oppositely to one another.
Claim 54
Dependent Claim 31 words
The method as defined in claim 48 including: alternating said fourth voltage on each said source line coupled to non-actived pixels, oppositely to each said source line coupled to activated pixels.
Claim 55
Dependent Claim 23 words
The method as defined in claim 49 including: alternating both of said frontplane and each said source line voltages with said fourth voltage.
Claim 56
Dependent Claim 19 words
The method as defined in claim 47 including: alternating only each said source line voltage with said fourth voltage.
Claim 57
Dependent Claim 19 words
The method as defined in claim 51 wherein: said fourth voltage is of opposite polarity to said third voltage.
Claim 58
Dependent Claim 22 words
The method as defined in claim 52 including: applying said second voltage also to each said source line coupled to non-activated pixels.
Claim 59
Dependent Claim 13 words
The method as defined in claim 53 wherein said second voltage is ground.
Claim 60
Dependent Claim 109 words
Apparatus for driving a thin film transistor active matrix, including a frontplane, a plurality of pixels and a plurality of gate and source lines, comprising: means for holding each non-selected gate line at a first voltage; means for applying a voltage of opposite polarity to said first voltage on each gate line coupled to a pixel to be activated; means for applying at least a second voltage to the frontplane; means for applying at least a third voltage to each source line coupled to the pixels to be activated; and means for alternating at least one of said frontplane and each said source line voltages with a fourth voltage.
Claim 61
Dependent Claim 109 words
Apparatus for driving a thin film transistor active matrix, including a frontplane, a plurality of pixels and a plurality of gate and source lines, comprising: means for holding each non-selected gate line at a first voltage; means for applying a voltage of opposite polarity to said first voltage on each gate line coupled to a pixel to be activated; means for applying at least a second voltage to the frontplane; means for applying at least a third voltage to each source line coupled to the pixels to be activated; and means for alternating at least one of said frontplane and each said source line voltages with a fourth voltage.
Claim 62
Dependent Claim 25 words
The apparatus as defined in claim 55 including: means for alternating both of said frontplane and each said source line voltages, oppositely to one another.
Claim 63
Dependent Claim 33 words
The apparatus as defined in claim 56 including: means for alternating said fourth voltage on each said source line coupled to non-actived pixels, oppositely to each said source line coupled to activated pixels.
Claim 64
Dependent Claim 25 words
The apparatus as defined in claim 57 including: means for alternating both of said frontplane and each said source line voltages with said fourth voltage.
Claim 65
Dependent Claim 21 words
The apparatus as defined in claim 55 including: means for alternating only each said source line voltage with said fourth voltage.
Claim 66
Dependent Claim 19 words
The apparatus as defined in claim 59 wherein: said fourth voltage is of opposite polarity to said third voltage.
Claim 67
Dependent Claim 24 words
The apparatus as defined in claim 60 including: means for applying said second voltage also to each said source line coupled to non-activated pixels.
Claim 68
Dependent Claim 13 words
The apparatus as defined in claim 61 wherein said second voltage is ground.

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