Patent US103283A successfully refreshed from Google Patents.
Patent EP0123922A2 successfully refreshed from Google Patents.
EP0123922A2
Expired / Lapsed
EP
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Instruction buffer bypass apparatus
Assignee: International Business Machines Corp
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Filing: 1984-03-30
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Granted: —
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Expires: 2004-03-30
Abstract
Abstract A bypass apparatus in a computer system is disclosed. The computer system includes a central storage facility for storing various instructions to be executed, an instruction register for storing an instruction being executed, and an instruction buffer, interconnected between the central storage facility and the instruction register, for temporarily storing the next instructions to be executed following execution of the instruction stored in the instruction register. A bypass path interconnects the cache to the instruction register for bypassing the instruction buffer when certain special instructions are being executed, such as an EXECUTE instruction. Consequently, the contents of the instruction buffer are not lost or destroyed as a result of execution of the special instruction. The computer system further includes an execute register interconnected between the central storage facility and the instruction register for storing one or more bytes of the instruction being executed when the byte-length of the instruction is greater than the byte-length of the instruction register which stores said instruction.
Inventors
- 👤 Mark Edward Burger
- 👤 Steven Lee George
- 👤 Chuck Hong Ngai
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-01 16:56
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/30181; G06F9/30145; G06F9/30149; G06F9/30185; G06F9/32; G06F9/322; G06F9/38; G06F9/3802; G06F9/3816
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
148 words
A computer system including a central storage facility for storing a plurality of instructions and one or more special instructions, an instruction buffer connected to the central storage facility for retrieving each of the plurality of instructions and said special instruction in sequence from said storage facility, and an instruction register connected to the instruction buffer for retrieving the instruction from the instruction buffer and storing the instruction for execution, characterized by bypass path means connected between said central storage facility and said instruction register for bypassing said instruction buffer when the special instruction is stored in said instruction register for execution whereby certain instructions are taken out of said sequence and transferred from said central storage facility to said instruction register via said bypass path means during execution of said special instruction thereby bypassing said instruction buffer and preventing the destruction of the contents of said buffer.
Claim 2
Dependent Claim
148 words
A computer system including a central storage facility for storing a plurality of instructions and one or more special instructions, an instruction buffer connected to the central storage facility for retrieving each of the plurality of instructions and said special instruction in sequence from said storage facility, and an instruction register connected to the instruction buffer for retrieving the instruction from the instruction buffer and storing the instruction for execution, characterized by bypass path means connected between said central storage facility and said instruction register for bypassing said instruction buffer when the special instruction is stored in said instruction register for execution whereby certain instructions are taken out of said sequence and transferred from said central storage facility to said instruction register via said bypass path means during execution of said special instruction thereby bypassing said instruction buffer and preventing the destruction of the contents of said buffer.
Claim 3
Dependent Claim
46 words
A computer system of claim 1, characterized by execute register means connected between said central storage facility and said instruction register for storing one or more additional bytes of said instruction when the byte-length of said instruction is greater than the byte-length of said instruction register.
Claim 4
Dependent Claim
50 words
A computer system of claim 2, characterized by byte-shifter means interconnecting said instruction buffer and said instruction register to said central storage facility for shifting and aligning said instruction received from said central storage facility by an amount depending upon one or more bits of the address of said instruction.
Claim 5
Dependent Claim
50 words
A computer system of claim 3, characterized in that said bypass path means comprises an instruction transfer path connecting said byte shifter means to said instruction register and bypassing said instruction buffer, said instruction transfer path being enabled when said special instruction is stored in said instruction register for execution.
Claim 6
Dependent Claim
172 words
A computer system according to one of the preceding claims, characterized by a central storage facility for storing a plurality of instructions to be executed, register means for storing one of said instructions to be executed, processor means connected to said register means for receiving and executing the one instruction stored in said register means, buffer means interconnected between said central storage facility and said register means for storing a next instruction of a sequence of instructions, said register means receiving and storing said next instruction when execution of said one instruction by said processor means is complete and bypass means connected between said central storage facility and said register means for bypassing said buffer means when a special instruction in said sequence of instructions is stored in said register means for execution by said processor means, whereby another instruction not a part of said sequence is retrieved from said central storage facility and is transferred to said register means via said bypass means thereby preserving the contents of said buffer means.
Claim 7
Dependent Claim
62 words
A computer system of claim 5, characterized by execute register means interconnected between said central storage facility and said register means for storing one or more bytes of said one instruction permitting the storage of the remaining bytes of said one instruction in said register means when the byte-length of said one instruction is greater than the byte-length of said register means.
References Cited (Backward Citations)
No citation records indexed.
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