Patent EP0123222A2 successfully refreshed from Google Patents.
EP0123222A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Digital-to-analog converter
Assignee: Toshiba Corp
•
Filing: 1984-04-12
•
Granted: —
•
Expires: 2004-04-12
Abstract
Abstract In a D/A converter, a reference voltage (Vref) is divided into a plurality of divided voltages (V0 to V256) by a plurality of resistors (r1 to r256) connected in series. The divided voltages are respectively selected by switches which are turned on according to the contents of a digital input. With the use of an expanding bit or bits, a plurality of the switches are simultaneously turned on.
Inventors
- 👤 Eiji C/O Patent Division Masuda
- 👤 Yasuhiko C/O Patent Division Fujita
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-08 19:28
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/66; H03M1/74; H03M1/80; H03M1/808; H03M1/12; H03M1/34; H03M1/36; H03M1/361; H03M1/362; H03M1/365
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
123 words
A digital-to-analog converter characterized by comprising: a voltage dividing circuit including a plurality of resistors (rl to r256; rn to rn+5, rn to rn-3) connected in series; a plurality of switches (SO to S256; Sn to Sn+5, Sn to Sn-4) for receiving the divided voltages from said voltage dividing circuit and providing them as corresponding analog signals; a switch select logic circuit (SEL) for producing a switch select signal for selecting one of the plurality of said switches according to the contents of a digital input; and a logic control circuit (RCL) for turning on one or more switches in response to a switch select signal of said switch select logic circuit and a signal of an expanding bit of said digital input.
Claim 2
Dependent Claim
123 words
A digital-to-analog converter characterized by comprising: a voltage dividing circuit including a plurality of resistors (rl to r256; rn to rn+5, rn to rn-3) connected in series; a plurality of switches (SO to S256; Sn to Sn+5, Sn to Sn-4) for receiving the divided voltages from said voltage dividing circuit and providing them as corresponding analog signals; a switch select logic circuit (SEL) for producing a switch select signal for selecting one of the plurality of said switches according to the contents of a digital input; and a logic control circuit (RCL) for turning on one or more switches in response to a switch select signal of said switch select logic circuit and a signal of an expanding bit of said digital input.
Claim 3
Dependent Claim
23 words
The digital-to-analog converter according to claim 1, characterized in that when said expanding bit signal is logical "0", one switch is turned on.
Claim 4
Dependent Claim
29 words
The digital-to-analog converter according to claim 1, characterized in that the plurality of said switches (SO to S256; Sn to Sn+5, Sn to Sn-4) have substantially the same resistances.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.