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EP0122095A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Circuit for reducing offset error in FM detection

Assignee: Ampex Systems Corp
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Filing: 1984-03-30
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Granted: —
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Expires: 2004-03-30
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Abstract

Abstract A switched RF signal, formed of modulated and blanking level signals, is selectively phase inverted by inverter (26) on alternate pairs of television lines to provide, in the output of an FM detector (30), a signal containing alternating positive and negative offset errors. The video signal is integrated to average and thus, in effect, minimize the alternating errors.

Inventors

  • 👤 Martin A. Lilley

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-05 13:14
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/76; H04N5/91; H04N5/92; H03; H03C; H03C3/00; H03C3/02; H03C3/09; H03D; H03D3/00; H03D3/001

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 79 words
A circuit for reducing offset errors in a switched RF signal formed of a reference signal and a modulated signal which switched signal is subsequently subject to frequency detection, characterized by means (24) disposed prior to the detection for inverting the phase of the switched signal at a selected rate, to define after detection a demodulated signal containing alternating offset errors; and means (40) for integrating the demodulated signal subsequent to the detection to average the alternating offset errors.
Claim 2
Dependent Claim 79 words
A circuit for reducing offset errors in a switched RF signal formed of a reference signal and a modulated signal which switched signal is subsequently subject to frequency detection, characterized by means (24) disposed prior to the detection for inverting the phase of the switched signal at a selected rate, to define after detection a demodulated signal containing alternating offset errors; and means (40) for integrating the demodulated signal subsequent to the detection to average the alternating offset errors.
Claim 3
Dependent Claim 36 words
A circuit according to claim 1 wherein the means for inverting include: a phase inverter (26); and control means (52, 58, 28) coupled to the phase inverter for supplying thereto timing pulses at the selected rate.
Claim 4
Dependent Claim 43 words
A circuit according to claim 2 including: means (54, 56) for providing a horizontal line related timing signal; and said control means being responsive to the providing means for supplying the timing pulses to the phase inverter on alternate pairs of horizontal lines.
Claim 5
Dependent Claim 68 words
A circuit according to any of claims 1 to 3 wherein the integrating means include: sample/hold means (42,44) operatively coupled to the FM detector means for holding successive samples of the demodulated signal derived from inverted and non-inverted portions respectively of the switched signal; and integrating means (40) coupled to the sample/hold means to produce in response to the successive samples an output signal with minimal offset error.
Claim 6
Dependent Claim 24 words
A circuit according to claim 4 wherein the sample/hold means is responsive to the control means to operate at half the horizontal line frequency.
Claim 7
Dependent Claim 113 words
An automatic frequency control circuit comprising a modulator (14) for providing an RF signal modulated by a video signal, a source (20) of a reference RF signal, means (16) for producing a combined signal by alternately switching between the modulated and reference signals, an FM detector (30) for the combined signal, and means responsive to the output of the FM detector to provide an error signal for controlling the modulator, characterized by a phase inverter (26) operable in response to timing signals to invert the phase of the combined.signal such that the said output contains alternating offset errors and means (42, 44, 40) for averaging the output signal to cancel the said errors.
Claim 8
Dependent Claim 113 words
An automatic frequency control circuit comprising a modulator (14) for providing an RF signal modulated by a video signal, a source (20) of a reference RF signal, means (16) for producing a combined signal by alternately switching between the modulated and reference signals, an FM detector (30) for the combined signal, and means responsive to the output of the FM detector to provide an error signal for controlling the modulator, characterized by a phase inverter (26) operable in response to timing signals to invert the phase of the combined.signal such that the said output contains alternating offset errors and means (42, 44, 40) for averaging the output signal to cancel the said errors.
Claim 9
Dependent Claim 28 words
A circuit according to claim 6 in which the arrangement is such that the frequency of phase inversion is performed at half the frequency of the said switching.
Claim 10
Dependent Claim 20 words
A circuit according to claim 7 in which the frequency of the said switching is half a horizontal line rate.
Claim 11
Dependent Claim 19 words
A circuit according to any of claims 6 to 8 in which the reference signal represents a blanking level.
Claim 12
Dependent Claim 59 words
A circuit according to any of claims 6 to 9 in which the means for averaging is operable to take successive samples of the said output, said samples containing offset errors of alternating polarity, and includes an integrator responsive to successive pairs of samples to produce an averaged output signal in which the alternating offset errors cancel each other.

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