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EP0112700A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Thin-film transistor circuit

Assignee: Toshiba Corp
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Filing: 1983-12-16
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Granted: —
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Expires: 2003-12-16
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Abstract

Abstract A thin-film transistor circuit used to drive a liquid crystal display (LCD) device is disclosed, which circuit includes a plurality of circuit components (C ij ) which are as arranged in the form of a matrix as to be connected with data lines (Y j , Y j+1 ) for supplying an image signal and with address lines (X i , X i+1 ) for supplying a gate pulse signal, whereby the circuit components control the picture element display in the unit picture element region of the LCD device. Each circuit component has a capacitor (26) connected to the unit picture element region (22) for temporarily storing the image signal, and a TFT transfer gate (20) having a gate electrode connected to one (X i ) of the address lines, a source electrode connected to one (Y j ) of the data lines, and a drain electrode connected to the capacitor (26). The transfer gate (20) performs the switching operation in response to the gate pulse signal, thereby transferring the image signal to the capacitor (26). A compensating pulse signal which is synchronized with the gate pulse signal and has a polarity opposite to that of the gate pulse signal is applied to the capacitor (26), thereby preventing a decrease in the image signal voltage across this capacitor (26) due to the parasitic capacitance component existing in the thin-film transistor (20).

Inventors

  • 👤 Kouji C/O Muroga Saburo 1-113 Suzuki
  • 👤 Mitsushi Ikeda
  • 👤 Toshio Aoki

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-30 16:37
CPC Classifications
G; G09; G09G; G09G3/00; G09G3/20; G09G3/22; G09G3/30; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/136; G02F1/1362; G02F1/136213; G09G3/34; G09G3/36; G09G3/3611; G09G3/3648; G09G3/3659; H; H10; H10D; H10D86/00; G09G2300/00; G09G2300/04; G09G2300/0421; G09G2300/043; G09G2300/08; G09G2300/0809; G09G2300/0842; G09G2300/0876; G09G2320/00; G09G2320/02; G09G2320/0219

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 238 words
A thin-film transistor circuit for driving a thin display device comprising a plurality of circuit components (C) which control the picture element display in unit picture element regions of said thin display device and which are arranged so as to form a matrix connected to data lines (Y) supplying an image signal and connected to address lines (X) substantially crossing the data lines perpendicularly and supplying a first pulse signal to command the transmission of the image signal, characterized in that each circuit component (C) comprises capacitor means (26, 84), connected to one unit picture element region (22) of said thin display device, for receiving and temporarily storing the image signal, transfer gate means (20, 58) for performing switching operation in response to the first pulse signal, thereby transferring the image signal to said capacitor means (26, 84), said transfer gate means including a thin-film transistor (20, 58) having a gate electrode connected to one of the address line (Xi), a source electrode connected to one data line (Yj) and a drain electrode connected to said capacitor means (26, 84), and voltage compensating means (28, 80, 86), connected to said capacitor means (26, 84), for supplying said capacitor means with a second pulse signal which is synchronized with the first pulse signal and has a polarity opposite to that of the first pulse signal, thereby preventing the image signal voltage across the capacitor means (26, 84) from decreasing.
Claim 2
Dependent Claim 238 words
A thin-film transistor circuit for driving a thin display device comprising a plurality of circuit components (C) which control the picture element display in unit picture element regions of said thin display device and which are arranged so as to form a matrix connected to data lines (Y) supplying an image signal and connected to address lines (X) substantially crossing the data lines perpendicularly and supplying a first pulse signal to command the transmission of the image signal, characterized in that each circuit component (C) comprises capacitor means (26, 84), connected to one unit picture element region (22) of said thin display device, for receiving and temporarily storing the image signal, transfer gate means (20, 58) for performing switching operation in response to the first pulse signal, thereby transferring the image signal to said capacitor means (26, 84), said transfer gate means including a thin-film transistor (20, 58) having a gate electrode connected to one of the address line (Xi), a source electrode connected to one data line (Yj) and a drain electrode connected to said capacitor means (26, 84), and voltage compensating means (28, 80, 86), connected to said capacitor means (26, 84), for supplying said capacitor means with a second pulse signal which is synchronized with the first pulse signal and has a polarity opposite to that of the first pulse signal, thereby preventing the image signal voltage across the capacitor means (26, 84) from decreasing.
Claim 3
Dependent Claim 77 words
The circuit as recited in claim 1, characterized in that said voltage compensating means (28, 80, 86) applies to said capacitor means (26, 84) the second pulse signal having a voltage value enough to compensate for the reduction of signal voltage resulting from the partial leakage of the image signal voltage stored in said capacitor means (26, 84) into the parasitic capacitance component (24) existing between the gate and drain electrodes of said thin-film transistor (20, 58).
Claim 4
Dependent Claim 101 words
The circuit as recited in claim 2, characterized in that said voltage compensating means includes signal generator means (V z ) for generating said second pulse signal, signal transmitting line means (Zi) connected to said signal generator means (V z ), for transmitting said second pulse signal, said line means being substantially parallel to said one address line (X i ), and second capacitor means (28), provided between said signal transmitting line means (Zi) and a common contact (34) of said first capacitor means (26) and said transistor drain electrode, for supplying said second pulse signal to said capacitor means (26).
Claim 5
Dependent Claim 57 words
The circuit as recited in claim 3, characterized in that the second pulse signal is generated so as to have a voltage value substantially equal to: where Cp: the parasitic capacitance to be caused in said transistor (20), C z : capacitance of said second capacitor means (28), V g: pulse voltage of the first pulse signal.
Claim 6
Dependent Claim 20 words
The circuit as recited in claim 3, characterized in that said thin display device includes a liquid crystal display device.
Claim 7
Dependent Claim 259 words
A liquid crystal display device comprising a liquid crystal layer (76) sealed between a substrate (50) having display electrodes (66) to define a plurality of unit picture element regions and a transparent electrode plate (72), and display drive circuit means (C) integrated and formed on said substrate (50), for controlling the picture element display of said liquid crystal layer (76), characterized in that said display drive circuit means includes a plurality of picture element circuit units (C 11 , C 12 , ..., C ij , ..., C mn ) which are arranged in an m x n matrix form (where, m, n: positive integer) corresponding to said unit picture element regions, each of which circuit units includes first capacitor means (26, 84), connected to said unit picture element region, for receiving and temporarily storing the image signal, and transfer gate means containing a thin-film transistor (20, 58), for receiving a gate pulse signal and for performing the switching operation in response to said pulse signal so as to transfer the image signal to said first capacitor means (26, 84), and that voltage compensating means is connected to said first capacitor means (26, 84), for supplying said capacitor means (26, 84) with a compensating pulse signal which is synchronized with the gate pulse signal and has a polarity opposite to that of said gate pulse signal, thereby preventing the deterioration of the voltage of said image signal stored in said first capacitor means (26, 84) due to the parasitic capacitance component inevitably existing in said thin-film transistor (20, 58).
Claim 8
Dependent Claim 259 words
A liquid crystal display device comprising a liquid crystal layer (76) sealed between a substrate (50) having display electrodes (66) to define a plurality of unit picture element regions and a transparent electrode plate (72), and display drive circuit means (C) integrated and formed on said substrate (50), for controlling the picture element display of said liquid crystal layer (76), characterized in that said display drive circuit means includes a plurality of picture element circuit units (C 11 , C 12 , ..., C ij , ..., C mn ) which are arranged in an m x n matrix form (where, m, n: positive integer) corresponding to said unit picture element regions, each of which circuit units includes first capacitor means (26, 84), connected to said unit picture element region, for receiving and temporarily storing the image signal, and transfer gate means containing a thin-film transistor (20, 58), for receiving a gate pulse signal and for performing the switching operation in response to said pulse signal so as to transfer the image signal to said first capacitor means (26, 84), and that voltage compensating means is connected to said first capacitor means (26, 84), for supplying said capacitor means (26, 84) with a compensating pulse signal which is synchronized with the gate pulse signal and has a polarity opposite to that of said gate pulse signal, thereby preventing the deterioration of the voltage of said image signal stored in said first capacitor means (26, 84) due to the parasitic capacitance component inevitably existing in said thin-film transistor (20, 58).
Claim 9
Dependent Claim 78 words
The device as recited in claim 6, characterized in that said display drive means (C) further comprises m address lines (X), commonly and respectively connected to said m-row picture element circuit units (C lj , C 2 j, ..., C m j), for transmitting said gate pulse signal, and n data lines (Y), commonly and respectively connected to said n-column picture element circuit unit (Ci ll Ci 2 , ..., Ci n ), for transmitting said image signal.
Claim 10
Dependent Claim 73 words
The device as recited in claim 7, characterized in that said thin-film transistor (20, 38) has, in one picture element circuit unit (C ij ) in the (i,j)th matrix position, a gate electrode connected to an i-th (where, 0 < i < m, n) address line (X i ), a source electrode connected to an i-th data line (Y j ), and a drain electrode connected to said first capacitor means (26, 84).
Claim 11
Dependent Claim 56 words
The device as recited in claim 8, characterized in that said voltage compensating means comprises second capacitor means (28, 80, 86), provided in each of said picture element circuit units (C) and connected to the drain electrode of said thin-film transistor (20, 58), for supplying the compensating pulse signal to said first capacitor means (26, 84).
Claim 12
Dependent Claim 135 words
The device as recited in claim 9, characterized in that said first capacitor means is substantially constituted by said unit picture element region (76) and said parasitic capacitance component (24); and that said second capacitor means (80) provided in the (i,j)th (where, 0 < i < m, 0 < j < n) picture element circuit unit (Cij) connected to the i-th address line (Xi) and the j-th data line (Y j ) among said plurality of picture element circuit units (C) is connected between the drain electrode of the thin-film transistor (58) of said (i,j)th picture element circuit unit ( Cij ) and the (i-l)th address line (X i-1 ) which is one line before the i-th address line (Xi), said compensating pulse signal being supplied thereto through the (i-l)th address line (Xi- 1 ).
Claim 13
Dependent Claim 115 words
The device as recited in claim 9, characterized in that, in said one picture element circuit unit (C ij ) connected to the i-th address line (X i ) and the j-th data line (Y j ) in the (i,j)th matrix position, said first capacitor means (84) is connected between the drain electrode of said thin-film transistor (58) and another address line (Xi -1 ) which serves as the ground line for said first capacitor means (84); and the said second capacitor means (86) is provided between the drain electrode of said thin-film transistor (58) and still another address line (X i+1 ) which also serves as the transmission line for said compensating pulse signal.

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