Patent EP0106222A2 successfully refreshed from Google Patents.
EP0106222A2
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EP
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Semiconductor memory device
Assignee: Toshiba Corp
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Filing: 1983-09-27
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Granted: —
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Expires: 2003-09-27
Abstract
Abstract A static type semiconductor memory device comprises a boosting circuit (11) for boosting a power source voltage (Vcc), a switch circuit (12) which selects the power source voltage (Vcc) in an operation mode while selecting a boosted voltage (Vccx) from the boosting circuit (11) in a wait mode, and a static semiconductor memory cell (13) which receives the voltage selected by the switch circuit (12), as a power source voltage (Vccs).
Inventors
- 👤 Tohru Furuyama
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-07 13:04
CPC Classifications
G; G11; G11C; G11C5/00; G11C5/14; G11C5/141; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/41; G11C11/413; G11C11/417
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
48 words
A static type semiconductor memory device characterized by comprising: means (11) for boosting a power source voltage (V CC ); and a static memory cell (13) for receiving the boosted output voltage (Vce x ) from said boosting means (11) as a power source voltage (V CCS ).
Claim 2
Dependent Claim
48 words
A static type semiconductor memory device characterized by comprising: means (11) for boosting a power source voltage (V CC ); and a static memory cell (13) for receiving the boosted output voltage (Vce x ) from said boosting means (11) as a power source voltage (V CCS ).
Claim 3
Dependent Claim
93 words
A static type semiconductor memory device according to claim 1, characterized by further comprising switch means (12) provided between said boosting means (11) and said memory cell (13) and coupled with the power source voltage (V CC ) and the boosted output voltage (V CCX ), said switch means (12) selecting the boosted output voltage (V CCX ) in a wait mode while selecting the power source voltage (V cc ) in an operation mode, the selected voltage being applied as the power source voltage (V CCS ) to said memory cell (13).
Claim 4
Dependent Claim
81 words
A static type semiconductor memory device according to claim 2, characterized by further comprising power source means (50) for said boosting means (11), wherein said power source means (50) stops the supply of an output power source voltage (V CCP ) and renders said boosting means (11) inoperative when said memory cell (13) is in an operation mode, while allowing the supply of the output power source voltage (V CCP ) thereby operating said boosting means (11) in a wait mode.
Claim 5
Dependent Claim
117 words
A static type semiconductor memory device according to claim 1, characterized in that said memory cell (13) includes first and second MOS transistors (18, 19) in which the drain and gate of one of said MOS transistors are respectively coupled with the gate and drain of the other transistor, a first load element (22) which is connected at one end to the drain of said first transistor (18) and at the other end to the power source voltage (V CCS ), and a second load element (23) which is connected at one end to the drain of said second MOS transistor (19) and at the other end to the power source voltage ( V CCS ) .
Claim 6
Dependent Claim
23 words
A static type semiconductor memory device according to claim 4, characterized in that said first and second load elements (22, 23) are resistors.
Claim 7
Dependent Claim
118 words
A static type semiconductor memory device according to claim 2, characterized in that said memory cell (13) includes first and second MOS transistors (18, 19) in which the drain and gate of one of said MOS transistors are respectively connected to the gate and drain of the other MOS transistor, a first load element (22) which is connected at one end to the drain of said first MOS transistor (18), and at the other end to the power source voltage (V CCS ), and a second load element (23) which is connected at one end to the drain of said second MOS transistor (19) and at the other end to the power source voltage ( V CCS ).
Claim 8
Dependent Claim
22 words
A static type semiconductor memory device according to claim 2, characterized in that said first and second load'elements (22, 23) are resistors.
References Cited (Backward Citations)
No citation records indexed.
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