Patent EP0100677A2 successfully refreshed from Google Patents.
EP0100677A2
Expired / Lapsed
EP
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Semiconductor devices including lateral-type transistors
Assignee: Fujitsu Ltd
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Filing: 1983-08-01
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Granted: —
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Expires: 2003-08-01
Abstract
Abstract A semiconductor device comprises at least one lateral-type PNP transistor (31) having a collector region (31c), an emitter region (31e), a base region (31b), and partially extended emitter wiring (37) covering the base region, to protect against channel leakage. The collector and emitter regions directly contact an isolation region (41), but the base region contacts the isolation region via a projection (42), preferably formed integrally with the isolation region. The partially extended emitter wiring may also extend over the projection, which possibility can serve to accommodate manufacturing tolerances that would otherwise reduce the degree of integration that could be achieved reliably.
Inventors
- 👤 Hideaki Isogai
- 👤 Chikai Ono
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 07:50
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/111; H10B; H10B10/00; H10B10/10; H10D10/00; H10D10/60; H10D62/00; H10D62/10; H10D62/17; H10D62/177; H10D62/184; H10W; H10W10/00; H10W10/01; H10W10/031; H10W10/30
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
83 words
A semiconductor device comprising at least one lateral-type PNP transistor having a P-type collector region, a P-type emitter region, an N-type base region, and an emitter wiring partially extended such as to entirely cover said base region, said collector and emitter regions being formed such as to directly contact said isolation region adjacent thereto, but said base region being formed such as to contact said isolation region via a projection extending partially therefrom, said partially extended emitter wiring being disposed above said projection.
Claim 2
Dependent Claim
83 words
A semiconductor device comprising at least one lateral-type PNP transistor having a P-type collector region, a P-type emitter region, an N-type base region, and an emitter wiring partially extended such as to entirely cover said base region, said collector and emitter regions being formed such as to directly contact said isolation region adjacent thereto, but said base region being formed such as to contact said isolation region via a projection extending partially therefrom, said partially extended emitter wiring being disposed above said projection.
Claim 3
Dependent Claim
21 words
A semiconductor device as set forth in claim 1, wherein said projection and said isolation region are integral with each other.
Claim 4
Dependent Claim
33 words
A semiconductor device as set forth in claiml or 2, wherein self-alignment is established between said isolation region and said emitter and collector regions and also between said base region and said projection.
Claim 5
Dependent Claim
59 words
A semiconductor device as set forth in claim 1, 2 or 3, wherein said projection is formed with a predetermined width between the body of said isolation region and said base region, which width is about equal to the value corresponding to the minimum limit in a predetermined range in allowable design size for said partially extended emitter wiring.
Claim 6
Dependent Claim
150 words
A semiconductor device comprising a semiconductor layer in which is formed a lateral-type transistor, having at a main surface of the semiconductor layer a collector region and a base region and an emitter region, and an isolation region for insulating the transistor from other portions of the device; the said collector region, base region and emitter region having respective peripheral boundary portions which extend adjacent to respective successive.portions of one lateral boundary of the isolation region; and there being an electrical connection layer which is connected to and overlies one of the said collector and emitter regions and extends additionally over the said base region so as to overlie that region substantially completely; characterised in that the said peripheral boundary portion of the base region is displaced, in relation to the said peripheral boundary portions of the collector and emitter regions, in the direction away from the said isolation region.
Claim 7
Dependent Claim
150 words
A semiconductor device comprising a semiconductor layer in which is formed a lateral-type transistor, having at a main surface of the semiconductor layer a collector region and a base region and an emitter region, and an isolation region for insulating the transistor from other portions of the device; the said collector region, base region and emitter region having respective peripheral boundary portions which extend adjacent to respective successive.portions of one lateral boundary of the isolation region; and there being an electrical connection layer which is connected to and overlies one of the said collector and emitter regions and extends additionally over the said base region so as to overlie that region substantially completely; characterised in that the said peripheral boundary portion of the base region is displaced, in relation to the said peripheral boundary portions of the collector and emitter regions, in the direction away from the said isolation region.
References Cited (Backward Citations)
No citation records indexed.
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