Patent EP0094891A2 successfully refreshed from Google Patents.
EP0094891A2
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Method of fabricating a vertical power MOSFET structure
Assignee: Fairchild Semiconductor Corp
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Filing: 1983-05-17
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Granted: —
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Expires: 2003-05-17
Abstract
Abstract A power MOSFET semiconductor structure is fabricated using the steps of depositing an epitaxial layer of N conductivity type silicon on an underlying silicon substrate of N conductivity type, forming a plurality of polycrystalline silicon electrodes on the epitaxial layer, each electrode being separated from the epitaxial layer by a layer of insulating material; introducing P and N conductivity type impurities into the epitaxial layer between the electrodes, the P type Impurity underlying the N type impurity; removing regions of the epitaxial layer to form openings in the epitaxial layer between the electrodes, the removed regions extending through the N type region but not through the P type region; and depositing electrically conductive material in the opening. The resulting semiconductor structure includes an N type substrate, an N type epitaxial layer, an opening in the epitaxial layer extending downward a selected distance, an upper N type region surrounding the opening and extending to the surface of the epitaxial layer, a lower P type region which extends to the surface of the epitaxial layer and everywhere separates the N type region from the epitaxial layer, an electrode formed in the opening and extending to the upper surface of the epitaxial layer, and a second eiectrode disposed above the epitaxial layer and separated from it by insulating material.
Inventors
- 👤 Madhukar B. Vora
- 👤 Vikram M. Patel
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-26 18:35
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/64; H10D30/66; H10D62/00; H10D62/10; H10D62/17; H10D62/393; H10W; H10W20/00; H10W20/40; H10D64/00; H10D64/20; H10D64/23; H10D64/251; H10D64/252; H10D64/2527; H10D64/256
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
117 words
A method of fabricating a semiconductor structure comprising: forming an electrically conductive gate electrode on a semiconductor drain region of first conductivity type, the electrode being separated from the drain region by a layer of insulating material; introducing first and opposite conductivity type impurity into the drain region adjacent the electrode to thereby form source and gate regions respectively, the opposite conductivity type impurity underlying the first conductivity type impurity; removing a portion of the drain region to form an opening adjacent the electrode, the removed region extending through the first conductivity type impurity but not through the opposite conductivity type impurity; and providing electrical connections to the drain region, the source region, and the gate electrode.
Claim 2
Independent Claim
117 words
A method of fabricating a semiconductor structure comprising: forming an electrically conductive gate electrode on a semiconductor drain region of first conductivity type, the electrode being separated from the drain region by a layer of insulating material; introducing first and opposite conductivity type impurity into the drain region adjacent the electrode to thereby form source and gate regions respectively, the opposite conductivity type impurity underlying the first conductivity type impurity; removing a portion of the drain region to form an opening adjacent the electrode, the removed region extending through the first conductivity type impurity but not through the opposite conductivity type impurity; and providing electrical connections to the drain region, the source region, and the gate electrode.
Claim 3
Dependent Claim
26 words
A method as in claim 1 wherein the step of forming an electrically conductive gate electrode comprises depositing polycrystalline silicon on the layer of insulating material.
Claim 4
Dependent Claim
24 words
A method as in claim 1 wherein the step of introducing first and opposite conductivity type comprises ion implanting first and opposite conductivity type.
Claim 5
Dependent Claim
27 words
A method in claim 3 wherein the step of introducing first and opposite conductivity type is followed by the step of diffusing first and opposite conductivity type.
Claim 6
Dependent Claim
17 words
A method as in claim 1 wherein the step of removing portions comprises etching the drain region.
Claim 7
Dependent Claim
15 words
A method as in claim 5 wherein the epitaxial layer is etched with a plasma.
Claim 8
Dependent Claim
19 words
A method as in claim 1 wherein the step of providing electrial connections comprises depositing metal in the opening.
Claim 9
Dependent Claim
27 words
A method as in claim 7 wherein the step of providing electrical connections further comprises forming the drain region on an underlying more heavily doped semiconductor substrate.
Claim 10
Dependent Claim
15 words
A method as in claim 1 wherein the first conductivity type is N conductivity type.
Claim 11
Dependent Claim
29 words
A method as in claim 1 wherein prior to the step of providing electrical connections a step of introducing additional opposite conductivity type impurity through the opening is performed.
Claim 12
Dependent Claim
21 words
A method as in claim 10 wherein the additional opposite conductivity type forms an opposite conductivity region beneath the gate region.
Claim 13
Independent Claim
108 words
A method of fabricating a semiconductor structure comprising: depositing first conductivity type epitaxial silicon having an upper surface on a first conductivity type silicon substrate; forming a plurality of polycrystalline silicon electrodes on the upper surface of the epitaxial layer but separated therefrom by a layer of silicon dioxide; introducing first and opposite conductivity type impurities into the epitaxial layer between the electrodes; removing regions of the epitaxial layer between the electrodes to form openings in the epitaxial layer, the openings extending at least through the first conductivity type; introducing opposite conductivity type impurity beneath the existing opposite conductivity type impurity; and forming metal electrodes in the openings.
Claim 14
Independent Claim
108 words
A method of fabricating a semiconductor structure comprising: depositing first conductivity type epitaxial silicon having an upper surface on a first conductivity type silicon substrate; forming a plurality of polycrystalline silicon electrodes on the upper surface of the epitaxial layer but separated therefrom by a layer of silicon dioxide; introducing first and opposite conductivity type impurities into the epitaxial layer between the electrodes; removing regions of the epitaxial layer between the electrodes to form openings in the epitaxial layer, the openings extending at least through the first conductivity type; introducing opposite conductivity type impurity beneath the existing opposite conductivity type impurity; and forming metal electrodes in the openings.
Claim 15
Dependent Claim
107 words
A semiconductor structure comprising: a semiconductor drain region of first conductivity type having an upper surface; an opening in the drain region extending downward from the upper surface a selected distance: a source region of first conductivity type contiguous to the opening and to the upper surface; a gate region of opposite conductivity type everywhere disposed between the source region and the drain region, and extending to the surface of the drain region; a gate electrode disposed above all of the gate region and separated therefrom by insulating material; and means for providing electrical connections to the source region, and the drain region, and the gate electrode.
Claim 16
Dependent Claim
107 words
A semiconductor structure comprising: a semiconductor drain region of first conductivity type having an upper surface; an opening in the drain region extending downward from the upper surface a selected distance: a source region of first conductivity type contiguous to the opening and to the upper surface; a gate region of opposite conductivity type everywhere disposed between the source region and the drain region, and extending to the surface of the drain region; a gate electrode disposed above all of the gate region and separated therefrom by insulating material; and means for providing electrical connections to the source region, and the drain region, and the gate electrode.
Claim 17
Dependent Claim
18 words
A structure as in claim 13 wherein the means for providing comprises an electrode deposited in the opening.
Claim 18
Dependent Claim
17 words
A structure as in claim 12 wherein the drain region comprises an epitaxial layer of semiconductor material.
Claim 19
Dependent Claim
22 words
A structure as in claim 14 wherein the means for providing comprises a semiconductor substrate upon which the epitaxial layer is formed.
Claim 20
Dependent Claim
14 words
A structure as in claim 13 wherein the opening includes substantially vertical side walls.
Claim 21
Dependent Claim
13 words
A structure as in claim 12 wherein the gate electrode comprises polycrystalline silicon.
Claim 22
Dependent Claim
13 words
A structure as in claim 17 wherein the insulating material comprises silicon dioxide.
References Cited (Backward Citations)
No citation records indexed.
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