Patent US4144542A successfully refreshed from Google Patents.
Patent EP0091375A2 successfully refreshed from Google Patents.
EP0091375A2
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EP
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Programmable deskewing of automatic test equipment
Assignee: Fairchild Semiconductor Corp
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Filing: 1983-04-01
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Granted: —
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Expires: 2003-04-01
Abstract
Abstract Apparatus is provided for delaying an electrical signal present at a selected node. The apparatus includes a first multiplexer 71 which connects one of eight inputs I 0 -I 7 to an output terminal 75, an adjustable length delay line 72 is coupled between each pair of input terminals l 0 , l 7 , and the input signal is then supplied to the first input terminal of the multiplexer 71. The delay lines 72 are trimmed to create the desired time delay between input terminal 74 and output terminal 75. For larger adjustments of the time delay for the signal is supplied to input terminal 74 and supplied to another terminal 78 connected to the input terminal 1 0 of another multiplexer 61. Logic gates 62-67 are connected between each pair of terminals 1 0 -1 6 of the second multiplexer 61. A coarser adjustment of the time delay than achievable with the delay lines 72 is made by switching of an appropriate input terminal of the second multiplexer 61 to the output terminal 69 of the multiplexer 61. In this manner one or more gates 62-67 may be added to the path delay of the input signal supplied to terminal 74.
Inventors
- 👤 Hoshang Vaid
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-26 14:34
CPC Classifications
H; H05; H05K; H05K1/00; H05K1/02; H05K1/0213; H05K1/0237; H05K1/0248; H03; H03K; H03K5/00; H03K5/13; H03K5/131; H03K5/14; H05K1/0286; H05K1/029; H03K2005/00013; H03K2005/00078; H03K2005/00084; H03K2005/0015; H03K2005/00228; H05K1/18; H05K1/181; H05K2201/00; H05K2201/09; H05K2201/09209; H05K2201/09218; H05K2201/09263; H05K2203/00; H05K2203/17; H05K2203/175
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
97 words
Apparatus for delaying an electrical signal present at a selected node, characterized by comprising: first multiplexing means (71) for connecting one of a plurality n of input terminals of the first multiplexing means to an output terminal (75); a plurality of adjustable length delay lines (72), each coupled between a different pair of input terminals to thereby cause the electrical signal to be supplied to each input terminal after a first input terminal (74) after passing through at least one delay line; and means for supplying the signal to be delayed to the first input terminal (74).
Claim 2
Dependent Claim
97 words
Apparatus for delaying an electrical signal present at a selected node, characterized by comprising: first multiplexing means (71) for connecting one of a plurality n of input terminals of the first multiplexing means to an output terminal (75); a plurality of adjustable length delay lines (72), each coupled between a different pair of input terminals to thereby cause the electrical signal to be supplied to each input terminal after a first input terminal (74) after passing through at least one delay line; and means for supplying the signal to be delayed to the first input terminal (74).
Claim 3
Dependent Claim
30 words
Apparatus as in claim 1, characterized in that the kth adjustable length-delay line (72) extends between k and k+1 input terminals, where k is an integer between 1 and n-1.
Claim 4
Dependent Claim
24 words
Apparatus as in claim 1 or 2, characterized in that each of the delay lines comprises an electrically conductive region on a ceramic substrate.
Claim 5
Dependent Claim
40 words
Apparatus as in anyone of claims 1 to 3, characterized in that each delay line further comprises an extended loop having a plurality of shorting bar regions (77, 78, 79) each extending from one portion of the loop to another.
Claim 6
Dependent Claim
29 words
Apparatus as in claim 4, characterized in that the length of the delay line is adjustable by destroying one or more of the shorting bar regions (77, 78, 79).
Claim 7
Dependent Claim
39 words
Apparatus as in any one of claims 1 to 5, characterized by further comprising first register means (73) coupled to the first multiplexing means (71) for controlling which of the input terminals is connected to the output terminals (75).
Claim 8
Dependent Claim
96 words
Apparatus for delaying an electrical signal present at a selected node, characterized by comprising: multiplexing means (61) for connecting one of a plurality of input nodes to an output terminal (69); a plurality of gate delay means (62 to 67) for delaying signals each coupled between a different pair of the input nodes to thereby cause the electrical signal to be supplied to each input node after the first input node (68) after passing through at least one gate delay means; and means for supplying the signal to be delayed to the first input node (68).
Claim 9
Dependent Claim
96 words
Apparatus for delaying an electrical signal present at a selected node, characterized by comprising: multiplexing means (61) for connecting one of a plurality of input nodes to an output terminal (69); a plurality of gate delay means (62 to 67) for delaying signals each coupled between a different pair of the input nodes to thereby cause the electrical signal to be supplied to each input node after the first input node (68) after passing through at least one gate delay means; and means for supplying the signal to be delayed to the first input node (68).
Claim 10
Dependent Claim
105 words
Apparatus as in any one of claims 1 to 6, characterized, in. that the means for supplying the signal to be delayed comprises: second multiplexing means (61) for connecting one of a plurality of input nodes to the first input terminal (74); a plurality of gate delay means (62 to 67) for delaying signals each coupled between a different pair of the input nodes to thereby cause the electrical signal to be supplied to each input node after the first input node (68) after passing through at least one gate delay means; and means for coupling the selected node to the first input node (68).
Claim 11
Dependent Claim
24 words
Apparatus as in claim 7 or 8, characterized in - that each of the gate delay means (62 to 67) comprises a logic gate.
Claim 12
Dependent Claim
22 words
Apparatus as in claim 9, characterized in that each gate (62 to 67) is coupled between an adjoining pair of input nodes.
Claim 13
Dependent Claim
19 words
Apparatus as in claim 10, characterized in that the selected node comprises the first input node (6 8 ).
Claim 14
Dependent Claim
34 words
Apparatus as in claim 8, characterized by further comprising second register means (73) coupled to the second multiplexing means for controlling which of the input nodes is coupled to the first input terminal (74).
Claim 15
Dependent Claim
24 words
Apparatus as-in claim 6 combined with claim 12, characterized in that the first and second register means comprise portions of the same register (73).
Claim 16
Dependent Claim
21 words
Apparatus as in claim 13, characterized in that the first and second register means (73) are coupled to receive controlling data.
Claim 17
Independent Claim
97 words
A method of delaying a signal a desired amount between a first node (68, 74) and an output terminal (69, 75), characterized by comprising: supplying the signal to be delayed to the first node (I o ) of a plurality of nodes (I 0 to I 7 ), connecting each of the plurality of nodes (I 0 to 1 7 ) to adjoining nodes (I 0 to 1 7 ) through apparatus for delaying signals (62 to 67 or 72); and connecting the node having the desired amount of time delay to the output terminal (69, 75).
Claim 18
Independent Claim
97 words
A method of delaying a signal a desired amount between a first node (68, 74) and an output terminal (69, 75), characterized by comprising: supplying the signal to be delayed to the first node (I o ) of a plurality of nodes (I 0 to I 7 ), connecting each of the plurality of nodes (I 0 to 1 7 ) to adjoining nodes (I 0 to 1 7 ) through apparatus for delaying signals (62 to 67 or 72); and connecting the node having the desired amount of time delay to the output terminal (69, 75).
References Cited (Backward Citations)
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