Patent EP0090134A1 successfully refreshed from Google Patents.
EP0090134A1
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EP
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Programmable fine frequency detector
Assignee: Raytheon Co
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Filing: 1983-01-21
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Granted: —
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Expires: 2003-01-21
Abstract
Abstract A detector circuit (10) is programmed to produce an output signal when an input signal is at a predetermined frequency. The input signal is provided to an inverter (14) to produce an inverse signal. The input signal together with the inverse signal are provided to two switches (16,18). The switches (16,18) are driven by first and second drive signals produced by a drive generator (60). The output terminals (24,28) of the switches are alternately connected to the input terminals in synchronism with the corresponding drive signals. The output signals from the switches (16, 18) are transmitted through low pass filters (26, 30) and the resulting signals are combined to produce a summation signal by a summation circuit (36). The summation signal is passed through an absolute value circuit (40) to produce an absolute value signal. The absolute value signal is examined by a threshold detector circuit (44) which produces an output when the absolute value signal exceeds a preset threshold. An oscillator (52) provides a reference signal to a programmable divider (56) that produces a selected rate signal for the drive generator (60). The programmable divider (56) is set such that the selected rate signal produced thereby corresponds to the frequency of the input signal to be detected. A phase and frequency error detector circuit (60) is provided to form a feedback loop to monitor the output of the switches (16, 18) and drive the programmable divider (56) to produce a selected rate frequency signal which corresponds to the frequency of the input signal.
Inventors
- 👤 Gary Patrick Jones
- 👤 Myles Arlyn Larson
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 10:45
CPC Classifications
G; G01; G01R; G01R23/00; G01R23/02; G01R23/15; H; H04; H04Q; H04Q1/00; H04Q1/18; H04Q1/30; H04Q1/44; H04Q1/444; H04Q1/45; H04Q1/457
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
141 words
A detecting circuit comprising, means for generating an inverse signal of an input signal; means for generating first and second periodic drive signals, said drive signals orthogonal to each other; first switch means connected to receive said input signal and said inverse signal and operated in synchronism with said first drive signal for alternately connecting said input signal and said inverse signal to an output terminal of said first switch means; second switch means connected to receive said input signal and said inverse signal and operated in synchronism with said second drive signal for alternately connecting said input signal and said inverse signal to an output terminal of said second switch means; means coupled to said output terminals for summing the signals received therefrom to produce a summation signal; and means for detecting when said summation signal exceeds a preset threshold.
Claim 2
Dependent Claim
141 words
A detecting circuit comprising, means for generating an inverse signal of an input signal; means for generating first and second periodic drive signals, said drive signals orthogonal to each other; first switch means connected to receive said input signal and said inverse signal and operated in synchronism with said first drive signal for alternately connecting said input signal and said inverse signal to an output terminal of said first switch means; second switch means connected to receive said input signal and said inverse signal and operated in synchronism with said second drive signal for alternately connecting said input signal and said inverse signal to an output terminal of said second switch means; means coupled to said output terminals for summing the signals received therefrom to produce a summation signal; and means for detecting when said summation signal exceeds a preset threshold.
Claim 3
Dependent Claim
31 words
The detector circuit recited in Claim 1 including a low pass filter connected between each of said output terminals and each of the corresponding input terminals of said means for summing.
Claim 4
Dependent Claim
23 words
The detector circuit recited in Claim 1 including an absolute valve circuit connected between said means for summing and said means for detecting.
Claim 5
Dependent Claim
43 words
The detector circuit recited in Claim 1 including a phase and frequency detector circuit coupled to said output terminals and connected to said means for generating for adjusting the frequency of said drive signals to correspond to the frequency of said input signal.
Claim 6
Dependent Claim
67 words
The detector recited in Claim 1 wherein said means for generating comprises: an oscillator for generating a reference signal; a programmable divider connected to receive said reference signal and generate therefrom a selected rate signal; and signal generator means connected to receive said selected rate signal for generating said first and second drive signals as periodic, bi-level signals having the same rate and a preset phase differential.
Claim 7
Dependent Claim
67 words
The detector circuit as recited in Claim 1 wherein said first and second drive signal are defined by the relationship: sal (µ,θ); cal (p,e) ≡ sal (φT, t-t O /T); cal (φT, t-t o/ T) wherein said first drive signal is defined as sal (l,e), said second drive signal is defined by cal (l,e), time is defined by t and a reference signal is defined by NT.
Claim 8
Independent Claim
130 words
A method for detecting an input signal having a selected frequency, comprising the steps of: generating an inverse signal of an input signal; generating first and second periodic, bi-level drive signals at a frequency corresponding to said selected frequency and having a predetermined phase differential; alternately connecting said input and inverse signals to a first output terminal as a function of the state of said first drive signal; alternatively connecting said input and said inverse signals to a second output terminal as a function of the state of said second drive signal; summing the signals received at said first and said second output terminals to produce a summation signal; and detecting when said summation signal exceeds a predetermined threshold to indicate that said input signal is at said selected frequency.
Claim 9
Independent Claim
130 words
A method for detecting an input signal having a selected frequency, comprising the steps of: generating an inverse signal of an input signal; generating first and second periodic, bi-level drive signals at a frequency corresponding to said selected frequency and having a predetermined phase differential; alternately connecting said input and inverse signals to a first output terminal as a function of the state of said first drive signal; alternatively connecting said input and said inverse signals to a second output terminal as a function of the state of said second drive signal; summing the signals received at said first and said second output terminals to produce a summation signal; and detecting when said summation signal exceeds a predetermined threshold to indicate that said input signal is at said selected frequency.
Claim 10
Dependent Claim
23 words
The method recited in Claim 7 including the step of low pass filtering the signals received through said first and second output terminals.
Claim 11
Dependent Claim
26 words
The method recited in Claim 7 including the step of taking the absolute value of said summation signal before the step of detecting said summation signal.
Claim 12
Dependent Claim
54 words
The method recited in Claim 7 including the steps of: measuring the phase and frequency of the signals received from said output terminals; and altering the frequency of said drive signals to in response to said measuring to cause the frequency of said drive signals to correspond to the frequency of said input signal.
Claim 13
Dependent Claim
53 words
The method recited in Claim 7 wherein the step of generating first and second drive signals comprises the steps of: generating a reference signal; dividing the rate of said reference signal to produce a selected rate signal; and generating said first and second drive signals as a function of said selected rate signal.
Claim 14
Dependent Claim
70 words
The method recited in Claim 7 wherein the predetermined phase differential between said first and said second drive signals is determined by the relationship: sal (µ,θ); cal (p,e) sal (φT, t-t o/ T); cal (φT, t-t O /T) where said first drive signal is defined as sal (1,θ), said second drive signal is defined by cal (l,e), time is defined by t and a reference signal is defined by NT.
References Cited (Backward Citations)
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