Patent EP0086372A2 successfully refreshed from Google Patents.
EP0086372A2
Expired / Lapsed
EP
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Tunneling gate semiconductor device
Assignee: Hitachi Ltd
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Filing: 1983-01-26
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Granted: —
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Expires: 2003-01-26
Abstract
Abstract A semiconductor device includes an insulation film (4) through which a charge can tunnel, a gate insulation film (40) of a material different from the material of said insulation film (4) or having a thickness different from that of said insulation film (4), and a floating gate (5) extending over said tunnelable insulation film (4). At least two sides of said tunnelable region (4) are bounded by a device separation oxide film (7).
Inventors
- 👤 Yuji Yatsuda
- 👤 Takaaki Hagiwara
- 👤 Masatada Horiuchi
- 👤 Shinichi Minami
- 👤 Toru Koga
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-28 19:38
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/681; H10D30/683
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
72 words
A semiconductor device including an insulation film (4) through which charge can tunnel, a gate insulation film (40) of a material different from the material of said insulation film (4) or having a thickness different from that of said insulation film (4), and a floating gate (5) extending over said tunnelable insulation film, wherein at least two sides of said tunnelable region (4) are bounded by a device separation oxide film (7).
Claim 2
Dependent Claim
72 words
A semiconductor device including an insulation film (4) through which charge can tunnel, a gate insulation film (40) of a material different from the material of said insulation film (4) or having a thickness different from that of said insulation film (4), and a floating gate (5) extending over said tunnelable insulation film, wherein at least two sides of said tunnelable region (4) are bounded by a device separation oxide film (7).
Claim 3
Dependent Claim
54 words
The semiconductor device as defined in claim 1, wherein an impurity introduction region provided over the surface region of a semiconductor substrate (1) of said tunnelable region (4) is electrically connected to one of source and drain regions (2, 3) via an impurity introduction region (32) provided below said device separation oxide film (7).
Claim 4
Dependent Claim
24 words
The semiconductor device as defined in claim 1 or 2, wherein said tunnelable region (4) is surrounded by said device separation oxide film (7).
References Cited (Backward Citations)
No citation records indexed.
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