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EP0085569A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Gallium arsenide logic circuit

Assignee: Unisys Corp
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Filing: 1983-02-01
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Granted: —
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Expires: 2003-02-01
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Abstract

Abstract A logic circuit comprises OR gates 11A, 11B, 11C, connected into the inputs of an AND gate, and is capable of operating with OR gate inputs either from GaAs circuits with logic levels of -0.3v and -1.7v or ECL currents with logic levels of -0.8v and -1.6v. The AND gate comprises diodes 21 with a pull-up transistor 01 and pull-down transistors 02, Q3 and 04, and forms part of a voltage-shifting network including also additional diodes 18, 19. The resulting voltages at the AND gate output are -1.7v and -3.1v (GaAs input) or -2.2v and -3.0v (ECL input). A suitable choice of amplifier (13) will yield from either set of voltages an output suitable for driving GaAs logic, or, with a source-follower output stage, an output suitable for ECL.

Inventors

  • 👤 Stephen Andrew Ransom
  • 👤 Tedd Kent Stickel

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-30 16:58
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/0175; H03K19/0185; H03K19/018507; H03K19/018535; H03K19/02; H03K19/08; H03K19/094; H03K19/0956

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 88 words
A gallium arsenide logic circuit comprising a plurality of diode OR gates (11A, 11B, 11C) each providing an input to an AND gate, the AND gate comprising forward-biased diodes (21) with a pull-up transistor (Ql) connected to their anodes and each with a pull-down transistor (Q2, Q3, Q4) connected to its cathode, an amplifier (12) connected to the output of the AND gate, and with a plurality of forward-biased diodes (18, 19) connected between the OR gates and the amplifier input to provide a further voltage shift down.
Claim 2
Dependent Claim 88 words
A gallium arsenide logic circuit comprising a plurality of diode OR gates (11A, 11B, 11C) each providing an input to an AND gate, the AND gate comprising forward-biased diodes (21) with a pull-up transistor (Ql) connected to their anodes and each with a pull-down transistor (Q2, Q3, Q4) connected to its cathode, an amplifier (12) connected to the output of the AND gate, and with a plurality of forward-biased diodes (18, 19) connected between the OR gates and the amplifier input to provide a further voltage shift down.
Claim 3
Dependent Claim 42 words
A gallium arsenide logic circuit according to claim 1 including at least one further diode OR gate (59) in series with the AND gate, the diodes (61, 62, 63, 64), of which provide a part of the said further voltage shift down.
Claim 4
Dependent Claim 30 words
A gallium arsenide logic circuit according to claim 1 or claim 2 in which the amplifier (13) is a GaAs differential amplifier with an output capable of driving GaAs logic.
Claim 5
Dependent Claim 31 words
A gallium arsenide logic circuit according to claim 3 in which the amplifier is further provided with a source-follower stage (Q12, 42, 44) providing a voltage capable of driving ECL logic.

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