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EP0085543A2
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Speech recognition apparatus
Assignee: Toshiba Corp
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Filing: 1983-01-27
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Granted: —
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Expires: 2003-01-27
Abstract
Abstract A speech recognition apparatus includes a speech signal analyzing circuit (4) for time-sequentially generating acoustic parameter patterns representing the phonetic features of speech signals, and phoneme reference memories (6,8) each storing a plurality of reference pattern vectors. A phoneme pattern vector from the speech signal analyzing circuit (4) is compared with each of the reference pattern vector stored in the phoneme reference memories (6,8) in order to recognize an input speech. The speech signal analyzing circuit (4) has a parameter extraction circuit (40, B1 to B16, S1 to S16 and L1 to L16) for time-sequentially extracting acoustic parameter patterns representing the speech signal, a first phoneme pattern vector memory (42) for storing a phoneme pattern vector including an acoustic parameter pattern of each frame from the parameter extraction circuit, and a second phoneme pattern vector memory (48) for storing a phoneme pattern vector including a plurality of acoustic parameter patterns from the parameter extraction circuit.
Inventors
- 👤 Yoichi Takebayashi
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 06:36
CPC Classifications
G; G10; G10L; G10L15/00
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
222 words
A speech recognition apparatus comprising speech signal generating means (2) for generating an electrical speech signal representing an input speech, speech signal analyzing means (4) for analyzing the speech signal from said speech signal generating means (2) thereby to time-sequentially generate acoustic parameter patterns representing the feature of the speech signal, calculating means (10, 12) for calculating the similarity between the phoneme pattern vector from said speech signal analyzing means (4) and a plurality of first reference pattern vectors representing a first group of speech constituting elements stored in first phoneme reference memory means (6) and the similarity between the phoneme pattern vector from said speech signal analyzing means (4) and a plurality of second reference pattern vectors representing a second group of speech constituting elements, stored in second phoneme reference memory means (8) and judging means (14, 16, 18, 20) for classifying the input speech based on the similarities calculated by said calculating means (10, 12), characterized in that said speech signal analyzing means (4) includes parameter extraction means for time-sequentially extracting acoustic parameter patterns representing the feature of the speech signal; first phoneme pattern vector memory means (42) for storing an acoustic parameter pattern from said parameter extraction means; and second phoneme pattern vector memory means (48) for storing a plurality of acoustic parameter patterns from said parameter extraction means.
Claim 2
Dependent Claim
222 words
A speech recognition apparatus comprising speech signal generating means (2) for generating an electrical speech signal representing an input speech, speech signal analyzing means (4) for analyzing the speech signal from said speech signal generating means (2) thereby to time-sequentially generate acoustic parameter patterns representing the feature of the speech signal, calculating means (10, 12) for calculating the similarity between the phoneme pattern vector from said speech signal analyzing means (4) and a plurality of first reference pattern vectors representing a first group of speech constituting elements stored in first phoneme reference memory means (6) and the similarity between the phoneme pattern vector from said speech signal analyzing means (4) and a plurality of second reference pattern vectors representing a second group of speech constituting elements, stored in second phoneme reference memory means (8) and judging means (14, 16, 18, 20) for classifying the input speech based on the similarities calculated by said calculating means (10, 12), characterized in that said speech signal analyzing means (4) includes parameter extraction means for time-sequentially extracting acoustic parameter patterns representing the feature of the speech signal; first phoneme pattern vector memory means (42) for storing an acoustic parameter pattern from said parameter extraction means; and second phoneme pattern vector memory means (48) for storing a plurality of acoustic parameter patterns from said parameter extraction means.
Claim 3
Dependent Claim
144 words
A speech recognition apparatus according to claim 1, characterized in that said calculating means (10, 12) comprises a first similarity calculating circuit (10) for calculating the similarity between the data stored in said first phoneme pattern vector memory means (42) and the data stored in said first phoneme reference memory means (6) and generating phoneme data representing the phoneme of the first group which is most similar to the data stored in said first phoneme pattern vector memory means (42) and a second similarity calculating circuit (12) for calculating the similarity between the data stored in said second phoneme pattern vector memory means (48) and the data stored in said second phoneme reference memory means (8) and generating phoneme data representing the phoneme of the second group which is most similar to the data stored in said second phoneme pattern vector memory means (48).
Claim 4
Dependent Claim
116 words
A speech recognition apparatus according to claim 2, characterized in that said judging means (14, 16, 18, 20) comprises a selecting circuit (14) for selecting one of the phoneme data from said first and second similarity calculating circuits (10, 12), a sequence memory (16) for storing phoneme data from said selecting circuit (14) one after another, a sequence data memory (20) storing a plurality of phoneme sequence data, and a matching circuit (18) for checking the matching between the data stored in said sequence memory (16) and the data stored in said sequence data memory (20) to thereby generate the phoneme sequence data which is most similar to the data stored in said sequence memory (16).
Claim 5
Dependent Claim
210 words
A speech recognition apparatus according to claim 2, characterized in that said judging means (14, 16, 18, 20) comprises a first sequence memory (14-1) for storing phoneme data from said first similarity calculating circuit (10), a second sequence memory (14-2) for storing phoneme data from said second similarity calculating circuit (12), a first sequence data memory (20-1) storing a plurality of first phoneme sequence data, a second sequence data memory (20-2) storing a plurality of second phoneme sequence data, a first matching circuit (18-1) for checking the matching between the data stored in said first sequence memory (14-1) and the data stored in said first sequence data memory (20-1) and generating the first phoneme sequence data which is most similar to the data stored in said first sequence memory (14-1), a second matching circuit (18-2) for checking the matching between the data stored in said second sequence memory (14-20) with the data stored in said second sequence data memory (20-2) and generating the second phoneme sequence data which is most similar to the data stored in said second sequence memory (14-2), and a judging circuit (21) for recognizing the input speech signal according to the first and second phoneme sequence data from said first and second matching circuits (18-1, 18-2).
Claim 6
Dependent Claim
145 words
A speech recognition apparatus according to claim 1, characterized in that said parameter extraction means comprises an analog-digital converting circuit (40) for converting an input speech signal from said speech signal generating means (2) to a digital signal, a plurality of band-pass filter circuits (Bl to.B16) connected to the output terminal of said analog-digital converting circuit (40) and having different frequency bands, a plurality of square circuits (S1 to S16) connected to said band-pass filter circuits (Bl to B16), respectively, a plurality of low-pass filter circuits (Ll to L16) having input terminals connected to the square circuits (Sl to S16) and output terminals connected to said first phoneme pattern vector memory means (42), and a plurality of adder circuits (43 to 46) having input terminals selectively connected to the low-pass filter circuits (Ll to L16) and output terminals connected to said second memory means (48).
Claim 7
Dependent Claim
197 words
A speech recognition apparatus according to claim 1, characterized in that said parameter extraction means comprises an analog-digital converting circuit (40) for converting an input speech signal from said speech signal generating means (2) to a digital signal, discrete Fourier transform circuit (50) for receiving the digital signal from said analog-digital converting circuit (40) and generating a plurality of output signals representing the discrete Fourier transform coefficients corresponding to said digital signal, a magnitude circuit (52) connected to said discrete Fourier transformer circuit (50), a magnitude squaring circuit (58) for generating a plurality of output signals representing the magnitude-squares of respective output signals from said discrete Fourier transform circuit (50), a plurality of adder circuits (60-1 to 60-16) the input terminals of which are selectively connected to the output terminals of said magnitude squaring circuit (58) and the output terminals of which are connected to said first phoneme pattern vector memory means (42), and a plurality of adder circuits (62-1 to 62-4) the input terminals of which are selectively connected to the output terminals of said magnitude squaring circuit (58) and the output terminals of which are connected to said second phoneme pattern vector memory means (48).
Claim 8
Dependent Claim
147 words
A speech recognition apparatus according to claim 1, characterized in that said parameter extraction means comprises an analog-digital converting circuit (40) for converting an input speech signal from said speech signal generating means (2) to a digital signal, a discrete Fourier transform circuit (50) for receiving the digital signal from said analog-digital converting circuit (40) and generating a plurality of output signals representing the discrete Fourier transform coefficients corresponding to said digital signal, a magnitude circuit (52) connected to said discrete Fourier transform circuit (50), a logarithm circuit (54) connected to the magnitude circuit (52), and an inverse discrete Fourier transform circuit (51) connected to said logarithm circuit (54) for supplying a plurality of low-order cepstrum coefficient data to said first phoneme pattern vector memory means (42) and supplying at least part of the low-order cepstrum coefficient data to said second phoneme pattern vector memory means (48).
Claim 9
Dependent Claim
68 words
A speech signal analyzing circuit for speech recognition apparatus, comprising parameter sampling means for time-sequentially extracting parameter patterns representing the features of an input speech signal, first phoneme pattern vector memory means (42) for storing an acoustic parameter pattern of one frame from the parameter extraction means, and second phoneme pattern vector memory means (48) for storing acoustic parameter patterns of plural frames from the parameter extraction means.
Claim 10
Dependent Claim
68 words
A speech signal analyzing circuit for speech recognition apparatus, comprising parameter sampling means for time-sequentially extracting parameter patterns representing the features of an input speech signal, first phoneme pattern vector memory means (42) for storing an acoustic parameter pattern of one frame from the parameter extraction means, and second phoneme pattern vector memory means (48) for storing acoustic parameter patterns of plural frames from the parameter extraction means.
Claim 11
Dependent Claim
150 words
A speech signal analyzing circuit according to claim 8, characterized in that said parameter extraction means comprises an analog-digital converting circuit (40) for converting an input speech signal from said speech signal generating means (2) to a digital signal, a plurality of band-pass filter circuits (Bl to B16) connected to the output terminal of said analog-digital converting circuit (40) and having different frequency bands, a plurality of square circuits (Sl to S16) connected to said band-pass filter circuits (Bl to B16), respectively, a plurality of low-pass filter circuits (Ll to L16) having input terminals connected to the square circuits (Sl to S16) and output terminals connected to said first phoneme pattern vector memory means (42), and a plurality of adder circuits (43 to 46) having input terminals selectively connected to the low-pass filter circuits (Ll to L16) and output terminals connected to said second phoneme pattern vector memory means (48).
Claim 12
Dependent Claim
198 words
A speech signal analyzing circuit according to claim 8, characterized in that said parameter extraction means comprises an analog-digital converting circuit (40) for converting an input speech signal from said speech signal generating means (2) to a digital signal, discrete Fourier transform circuit (50) for receiving the digital signal from said analog-digital converting circuit (40) and generating a plurality of output signals representing the discrete Fourier transform coefficients corresponding to said digital signal, a magnitude circuit (52) connected to said discrete Fourier transform circuit (50), a magnitude squaring circuit (58) for generating a plurality of output signals representing the magnitude-squares of respective output signals from said discrete Fourier transform circuit (50), a plurality of adder circuits (60-1 to 60-16) the input terminals of which are selectively connected to the output terminals of said magnitude squaring circuit (58) and the output terminals of which are connected to said first phoneme pattern vector memory means (42), and a plurality of adder circuits (62-1 to 62-4) the input terminals of which are selectively connected to the output terminals of said magnitude squaring circuit (58) and the output terminals of which are connected to said second phoneme pattern vector memory means (48).
Claim 13
Dependent Claim
148 words
A speech signal analyzing circuit according to claim 8, characterized in that said parameter extraction means comprises an analog-digital converting circuit (40) for converting an input speech signal from said speech signal generating means (2) to a digital signal, a discrete Fourier transform circuit (50) for receiving the digital signal from said analog-digital converting circuit (40) and generating a plurality of output signals representing the discrete Fourier transform coefficients corresponding to said digital signal, a magnitude circuit (52) connected to said discrete Fourier transform circuit (50), a logarithm circuit (54) connected to the magnitude circuit (52), and an inverse discrete Fourier transform circuit (51) connected to said logarithm circuit (54) for supplying a plurality of low-order cepstrum coefficient data to said first phoneme pattern vector memory means (42) and supplying at least part of the low-order cepstrum coefficient data to said second phoneme pattern vector memory means (48).
References Cited (Backward Citations)
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