Patent EP0083447A2 successfully refreshed from Google Patents.
EP0083447A2
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Triple diffused short channel device structure
Assignee: Thomson Components-Mostek Corp
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Filing: 1982-12-28
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Granted: —
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Expires: 2002-12-28
Abstract
Abstract A short channel metal oxide semiconductor transistor device is processed without undesirable short channel effects, such as V T falloff and with a reasonable source-drain operating voltage support. In a substrate lightly doped with a P-type conductivity material and source and drain region heavily doped with an N-type conductivity material, two lightly doped N- regions are disposed between the edge of the gate and the source and drain regions. A channel region is more heavily doped with P-type material than the substrate. Two regions extend from opposite sides of the channel region to an area generally below the two N- regions and above the substrate, which regions are more heavily doped than the channel regions.
Inventors
- 👤 Yu-Pin Han
- 👤 Tsiu Chiu Chan
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 06:37
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D30/0229; H10D30/60; H10D62/00; H10D62/10; H10D62/17; H10D62/213; H10D62/221; H10D62/235; H10D62/299; H10D62/307; H10D62/351; H10D62/357; H10D62/364; H10D62/371; H10P; H10P30/00; H10P30/20; H10P30/22
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
170 words
A metal oxide semiconductor transistor device comprising: a semiconductor substrate doped with a first conductivity type of material; a first insulating layer disposed on a major surface of the semiconductor substrate; source and drain regions of a second conductivity type disposed in said substrate and doped more heavily than said substrate; a channel region of the first conductivity type disposed in said substrate between said source and drain regions, said channel region being doped more heavily than said substrate; two first regions of the second conductivity type disposed between the source and drain and the edges of the gate, said first regions being more lightly doped than said source and drain; two second regions of the first conductivity type disposed in the substrate located between said channel region, below said first regions and extending to said source and drain, said second regions being more heavily doped than said channel region; and a conductive gate disposed on said insulating layer and aligned over said channel region and said two second regions.
Claim 2
Dependent Claim
170 words
A metal oxide semiconductor transistor device comprising: a semiconductor substrate doped with a first conductivity type of material; a first insulating layer disposed on a major surface of the semiconductor substrate; source and drain regions of a second conductivity type disposed in said substrate and doped more heavily than said substrate; a channel region of the first conductivity type disposed in said substrate between said source and drain regions, said channel region being doped more heavily than said substrate; two first regions of the second conductivity type disposed between the source and drain and the edges of the gate, said first regions being more lightly doped than said source and drain; two second regions of the first conductivity type disposed in the substrate located between said channel region, below said first regions and extending to said source and drain, said second regions being more heavily doped than said channel region; and a conductive gate disposed on said insulating layer and aligned over said channel region and said two second regions.
Claim 3
Dependent Claim
27 words
The metal oxide semiconductor transistor device of Claim 1, wherein the first conductivity type of material is boron and the second conductivity type of material is arsenic.
Claim 4
Dependent Claim
16 words
The metal oxide semiconductor transistor device of Claim 1, wherein the conductive gate is polycrystalline silicon.
Claim 5
Independent Claim
215 words
A method for manufacturing a metal oxide semiconductor transistor device comprising: providing a semiconductor substrate of a first conductivity type; forming a first insulating layer of silicon dioxide on an active surface of the substrate; implanting ions of a first conductivity type into said substrate; depositing a layer of polysilicon on said first insulating layer; implanting ions of a second conductivity type through said polysilicon layer; growing a second region of silicon dioxide, said silicon dioxide region being grown over said polysilicon layer; placing a photoresistive mask over said second oxidation layer for forming a gate of the semiconductor device; etching a predetermined portion of said second oxidation layer; plasma etching said polysilicon layer; removing a predetermined portion of said polysilicon layer underneath said second silicon dioxide layer; etching said second layer of silicon dioxide; stripping said photoresist area from said second oxidation layer; implanting ions of the second conductivity type; implanting ions of the first conductivity type; etching said second layer of silicon dioxide overhanging said polysilicon gate layer; etching said first layer of silicon dioxide surrounding said polysilicon gate layer; implanting ions of said first conductivity type; implanting ions of said second conductivity type; diffusing the implanted ions into said substrate; and oxidizing the active surface of said substrate, including said polysilicon gate.
Claim 6
Independent Claim
215 words
A method for manufacturing a metal oxide semiconductor transistor device comprising: providing a semiconductor substrate of a first conductivity type; forming a first insulating layer of silicon dioxide on an active surface of the substrate; implanting ions of a first conductivity type into said substrate; depositing a layer of polysilicon on said first insulating layer; implanting ions of a second conductivity type through said polysilicon layer; growing a second region of silicon dioxide, said silicon dioxide region being grown over said polysilicon layer; placing a photoresistive mask over said second oxidation layer for forming a gate of the semiconductor device; etching a predetermined portion of said second oxidation layer; plasma etching said polysilicon layer; removing a predetermined portion of said polysilicon layer underneath said second silicon dioxide layer; etching said second layer of silicon dioxide; stripping said photoresist area from said second oxidation layer; implanting ions of the second conductivity type; implanting ions of the first conductivity type; etching said second layer of silicon dioxide overhanging said polysilicon gate layer; etching said first layer of silicon dioxide surrounding said polysilicon gate layer; implanting ions of said first conductivity type; implanting ions of said second conductivity type; diffusing the implanted ions into said substrate; and oxidizing the active surface of said substrate, including said polysilicon gate.
Claim 7
Dependent Claim
39 words
The method of making a metal oxide semiconductor transistor device of Claim 4, wherein the implantation of ions of the first conductivity type are boron ions and the implantation of ions of the second conductivity type are arsenic ions.
References Cited (Backward Citations)
No citation records indexed.
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