EP0077091A1
Expired / Lapsed
EP
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Multiplier circuit for stereo decoders
Assignee: Koninklijke Philips NV
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Filing: 1982-09-30
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Granted: —
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Expires: 2002-09-30
Abstract
Abstract Multiplier circuit for multiplying an information signal x(t) by a periodic signal y(t) having frequency f o , more specifically for amplitude modulation purposes in a stereo decoder. The multiplier circuit comprises N switching circuits 21(k) wherein k = 0, 1, ... N-1 which are each connected to a clock pulse generator 221, 222 by means of a control channel 25(k) and are each connected to an input of an adder device 28 by means of a signal channel 26(k). In addition, each switching circuit 21(k) receives the information signal x(t). A series of clock pulses g(k;t) is applied to each control channel in such a manner that for the control channel having number k these clock pulses occur at the instants wherein to represents a constant T 0 = 1/f o and l = ..., -2, -1, 0, 1, 2, .... Each signal channel 26(k) comprises a weighting network 27(k) having a constant weighting factor W(k) defined by the relation Each control channel 25(k) [or each signal channel 26(k)] incorporates a pulse reshaping circuit 24(k), which converts a pulse applied thereto into a pulse having a width equal to wherein M represents an integer, for example M = N-1.
Inventors
- 👤 Theodoor A. C. M. Claasen
- 👤 Albert Jan Stienstra
- 👤 Arthur Hermanus Maria Van Roermund
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 19:33
CPC Classifications
H; H04; H04H; H04H20/00; H04H20/44; H04H20/46; H04H20/47; H04H20/48; H03; H03D; H03D1/00; H03D1/22
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
258 words
A multiplier circuit for multiplying an information signal x(t) by a periodic signal y(t) having a period 1/f o , comprising: a. pulse generator circuit for generating N periodic pulse signals g(k;t) wherein k = 0, 1, 2, 3, ... N-1, N being at least equal to three and wherein a.1. each pulse signal has a pulse repetition rate a.2. the pulses in the pulse signal g(k;t) occur at instants t o + k To N + iT o , wherein t represents a constant and i = ... -2, -1, 0, 1, 2, ...; b. N switching circuits 21(k) each having: b.1. a control input A(k) which is connected to the pulse generator by means of a control channel 25(k), the pulse signal g(k;t) being applied to this control channel; b.2. an information signal input B(k) for receiving the information signal x(t); b.3. a signal output D(k) connected to a signal channel 26(k), c. N weighting factors 27(k) each having a constant weighting factors W(k) defined by the relation which each produce a product signal, each signal channel comprising such a weighting network; d. an adder device 28 connected to each one of the signal channels for adding the product signals together; e. N pulse reshaping circuits 24(k) for converting a pulse applied thereto into a pulse whose width τ is equal to an integral fraction times 1/f o , each channel, formed by the cascade arrangement of a control channel, the associated switching circuit and the signal channel connected thereto, comprising such a pulse reshaping circuit.
Claim 2
Dependent Claim
258 words
A multiplier circuit for multiplying an information signal x(t) by a periodic signal y(t) having a period 1/f o , comprising: a. pulse generator circuit for generating N periodic pulse signals g(k;t) wherein k = 0, 1, 2, 3, ... N-1, N being at least equal to three and wherein a.1. each pulse signal has a pulse repetition rate a.2. the pulses in the pulse signal g(k;t) occur at instants t o + k To N + iT o , wherein t represents a constant and i = ... -2, -1, 0, 1, 2, ...; b. N switching circuits 21(k) each having: b.1. a control input A(k) which is connected to the pulse generator by means of a control channel 25(k), the pulse signal g(k;t) being applied to this control channel; b.2. an information signal input B(k) for receiving the information signal x(t); b.3. a signal output D(k) connected to a signal channel 26(k), c. N weighting factors 27(k) each having a constant weighting factors W(k) defined by the relation which each produce a product signal, each signal channel comprising such a weighting network; d. an adder device 28 connected to each one of the signal channels for adding the product signals together; e. N pulse reshaping circuits 24(k) for converting a pulse applied thereto into a pulse whose width τ is equal to an integral fraction times 1/f o , each channel, formed by the cascade arrangement of a control channel, the associated switching circuit and the signal channel connected thereto, comprising such a pulse reshaping circuit.
Claim 3
Dependent Claim
32 words
A multiplier circuit as claimed in Claim 1, in which each of the weighting networks 27(k) has a weighting factor W(k) defined by the expression wherein p, q and φ represent constants.
Claim 4
Dependent Claim
32 words
A multiplier circuit as claimed in Claim 1, in which the pulse reshaping circuit 24(k) is included in The signal channel and forms a sample-and-hold circuit with the associated switching circuit 21(k).
Claim 5
Dependent Claim
57 words
A multiplier circuit as claimed in Claim 1, in which the pulse reshaping circuit is included in the signal channel and is formed by a capacitor having two poles, one pole being connected to the signal output D(k) of the associated switching circuit 21(k) and the other pole to a junction which is common to all capacitors.
Claim 6
Dependent Claim
63 words
A multiplier circuit as claimed in Claim 1, in which the pulse reshaping circuit 24(k) is included in the control channel and the associated signal channel comprising a capacitor having two poles, one pole being connected to the signal output D(k) of the associated switching circuit 21(k) and the other pole being connected to a junction point which is common to all capacitors.
Claim 7
Dependent Claim
35 words
A multiplier circuit as claimed in Claim 4 or Claim 5, in which the adder device 28 is connected to che said common junction and is formed by an amplifier circuit by-passed by a capacitor.
Claim 8
Dependent Claim
39 words
A multiplier circuit as claimed in Claim 6, in which the weighting factor W(k) in a signal channel is determined by the ratio between the capacitance C(k) in the signal channel and the capacitance C by-passing the amplifier circuit.
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