Patent EP0073623A2 successfully refreshed from Google Patents.
EP0073623A2
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Insulated gate field effect transistor
Assignee: Hitachi Ltd
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Filing: 1982-08-23
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Granted: —
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Expires: 2002-08-23
Abstract
Abstract An insulated gate field effect transistor formed in one surface of a semiconductor substrate (1) has a channel, the surface portion of which has an impurity (9) with a conductivity type opposite to that of the substrate (1), and the deeper portion of which has an impurity (8) of the same conductivity type to the substrate. Moreover, the source and/or the drain (6, 7) of the transistor has an impurity layer of a conductivity type opposite to that of the substrate, with an impurity distribution (13, 14) gently sloped. The use of such impurity distributions overcomes the problems of the short-channel effect and reduction of the source-drain breakdown voltage which are present in standard devices. This enables a shorter channel to be used for a given source-drain breakdown voltage which is of advantage in a LSI having a high density of integration.
Inventors
- 👤 Hideo Sunami
- 👤 Hiroo Masuda
- 👤 Katsuhiro Shimohigashi
- 👤 Yoshiaki Kamigaki
- 👤 Eiji Takeda
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-29 14:28
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/601; H10D30/605; H10D30/637; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; H10D62/17; H10D62/351; H10D62/357; H10D62/364; H10D62/371; H10D62/60
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
121 words
An insulated gate field effect transistor having a substrate (1) of a first conductivity type, a channel in a surface of the substrate (1), source and drain regions (6,7) adjacent the channel, a gate electrode (3) overlying the channel and an insulating film (2) between the gate electrode (3) and the substrate (1); characterised in that: the source and/or drain region (6,7) has an impurity layer of a second conductivity type, the impurity layer having an impurity distribution (13,14) with a low overall gradient; and the channel has first impurity (9) of the second conductivity type adjacent the surface of the substrate, and a second impurity (8) of the first conductivity type deeper within the channel than the first impurity (9).
Claim 2
Dependent Claim
121 words
An insulated gate field effect transistor having a substrate (1) of a first conductivity type, a channel in a surface of the substrate (1), source and drain regions (6,7) adjacent the channel, a gate electrode (3) overlying the channel and an insulating film (2) between the gate electrode (3) and the substrate (1); characterised in that: the source and/or drain region (6,7) has an impurity layer of a second conductivity type, the impurity layer having an impurity distribution (13,14) with a low overall gradient; and the channel has first impurity (9) of the second conductivity type adjacent the surface of the substrate, and a second impurity (8) of the first conductivity type deeper within the channel than the first impurity (9).
Claim 3
Dependent Claim
30 words
An insulated gate field effect transistor according to claim 1, wherein said second impurity (8) in the channel has a distribution (11) with a peak located within said substrate (1).
Claim 4
Dependent Claim
45 words
An insulated gate field effect transistor according to claim 1, or claim 2, wherein said second impurity (8) in the channel has a distribution (11) which extends at least as deep into the substrate as the impurity layer in the source and/or drain region (6,7).
Claim 5
Dependent Claim
71 words
An insulated gate field effect transistor according to any one of the preceding claims, wherein the impurity layer in the source and/or drain region includes a first impurity layer (6) having a high peak density and a steep distribution (13), and a second impurity layer (7) having a lower peak density than that of said first impurity layer (6) and a deeper distribution (14) than that of said first impurity layer.
Claim 6
Dependent Claim
36 words
An insulated gate field effect transistor according to claim 4, wherein the first impurity layer (6) is formed by the diffusion of arsenic whereas said second impurity layer (7) is formed by the diffusion of phosphorous.
Claim 7
Dependent Claim
71 words
An insulated gate field effect transistor according to claim 1, wherein the drain region (6,7) has an impurity layer of the second conductivity type having impurity distribution (13,14) with a low overall gradient, the insulated gate field effect transistor further comprising a second gate electrode (31) formed to correspond to said source region; and a second gate insulating film (30) lying between said second gate electrode (31) and said source region.
Claim 8
Dependent Claim
24 words
An insulated gate field effect transistor according to claim 6, wherein said source region has the same impurity distribution as that of the channel.
References Cited (Backward Citations)
No citation records indexed.
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