Polycrystalline thin-film transistor,integrated circuit including such transistors and a display device including such a circuit

Abstract

Abstract A polycristalline thin-film transistor has a polycristalline silicon layer 2 formed on a substrate 1. The layer 2 includes at least a pair of electrode-contacted regions 4 for causing carriers to migrate, and there are means for controlling the carriers. In order to achieve high uniformity of characteristics among the different transistors in the layer, the length of the region in which the carriers migrate is at least 10 times greater than the mean grain size of the silicon in the general migration direction of the carriers, and the mean grain size in at least the region in which the carriers migrate is not less than 150 nm. Preferably, the ratio between the coefficients of thermal expansion of the substrate and the polycrystalline silicon layer is in the range 0.3 to 3.0.

Inventors

• 👤 Makoto Matsui
• 👤 Yasuhiro Shiraki
• 👤 Eiichi Maruyama

Bibliographic Details