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Patent EP0071335A2 successfully refreshed from Google Patents.
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EP0071335A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Field effect transistor

Assignee: Xerox Corp
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Filing: 1982-06-10
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Granted: —
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Expires: 2002-06-10
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Abstract

Abstract A short-channel field effect transistor including a standard tip implant type of source (12, 40, 56) and drain (14,42, 58) each disposed in the surface of a semiconductor; a gate electrode (30, 46) positioned upon the semiconductor between the source and drain, and control plugs (24, 26, 52, 54, 62, 64) contiguous with the source and drain for eliminating substrate punch-through currents without substantially increasing the device junction capacitance.

Inventors

  • 👤 Jacob D. Haskell

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-28 12:10
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6715; H10D62/00; H10D62/10; H10D62/17; H10D62/351; H10D62/357; H10D62/364; H10D62/371

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 183 words
A short channel field effect transistor including a substrate (10, 38, 66), a source region (16, 40, 56) of a first conductivity type disposed upon said substrate and comprising a relatively shallow diffused portion (20) contiguous with a relatively deep diffused portion, a drain region (18, 42, 58) of said first conductivity type disposed upon said substrate and comprising a relatively shallow diffused portion (22) contiguous with a relatively deep diffused portion, wherein said shallow portions are spaced apart from each other, a gate insulation film (28, 48) located on a surface between said source and drain regions, a gate electrode (30, 50, 46) located upon said gate insulation film, a source electrode (32) in contact with the upper surface of said source region, a drain electrode (34) in contact with the upper surface of said drain region, plug regions (24, 26, 52, 54, 62, 64) of a second conductivity type, opposite said first conductivity type, contiguous with each source and drain region and located beneath each of said shallow diffused portions and to the side of each of said deep diffused portions.
Claim 2
Dependent Claim 183 words
A short channel field effect transistor including a substrate (10, 38, 66), a source region (16, 40, 56) of a first conductivity type disposed upon said substrate and comprising a relatively shallow diffused portion (20) contiguous with a relatively deep diffused portion, a drain region (18, 42, 58) of said first conductivity type disposed upon said substrate and comprising a relatively shallow diffused portion (22) contiguous with a relatively deep diffused portion, wherein said shallow portions are spaced apart from each other, a gate insulation film (28, 48) located on a surface between said source and drain regions, a gate electrode (30, 50, 46) located upon said gate insulation film, a source electrode (32) in contact with the upper surface of said source region, a drain electrode (34) in contact with the upper surface of said drain region, plug regions (24, 26, 52, 54, 62, 64) of a second conductivity type, opposite said first conductivity type, contiguous with each source and drain region and located beneath each of said shallow diffused portions and to the side of each of said deep diffused portions.
Claim 3
Dependent Claim 31 words
A field effect transistor as claimed in claim 2, in which the substrate is of a semiconductive material (10, 38) of type opposite to that of the source and drain regions.
Claim 4
Dependent Claim 44 words
A transistor as claimed in claim 1 or 2, in which said plug regions are positioned so that the facing parts of said shallow diffused portions are not blocked thereby, and in which said plug regions are slightly shallower than said deep diffused portions.
Claim 5
Dependent Claim 20 words
A transistor as claimed in any preceding claim, in that said source and drain electrodes overlie said deep diffused portions.
Claim 6
Dependent Claim 29 words
A transistor as claimed in any preceding claim, including a channel region (44) of the second conductivity type underlying said gate and located between said source and drain regions.
Claim 7
Dependent Claim 24 words
A transistor as claimed in claims 2 and 5, in which said channel region has an impurity concentration approximately the same as said substrate.
Claim 8
Dependent Claim 17 words
A transistor as claimed in claim 1, in which the substrate is of an insulating material (66).
Claim 9
Dependent Claim 45 words
A transistor as claimed in claim 7, including a channel region (60) of semiconductive material of either conductivity type located below the gate electrode and contiguous with the plug regions and the unshielded end faces of the shallow portions of the source and drain regions.

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