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Patent EP0068883A2 successfully refreshed from Google Patents.
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EP0068883A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

A level converter circuit

Assignee: Fujitsu Ltd
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Filing: 1982-06-29
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Granted: —
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Expires: 2002-06-29
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Abstract

Abstract A level converter circuit for converting a first (TTL level) logic signal using a lower voltage supply as a base potential into a second (ECL level) logic signal using a higher voltage supply as a base potential, comprising; first (Q 4 ) and second (Q 5 ) bipolar transistors, the base potential of the second logic signal being applied to the collectors of the first (Q 4 ) and second (Q 5 ) bipolar transistors, the emitter of the first bipolar transistor (Q 4 ) being connected to the base of the second bipolar transistor (Q 5 ), and the emitter of the second bipolar transistor (Q 5 ) being used for the output terminal (T 3 ) of the level converter circuit, and means for turning on the second bipolar transistor (Q 5 ) or both bipolar transistors (0 4 and 0 5 ) in response to the first logic signal applied to the input terminal (T 1 , T 2 )

Inventors

  • 👤 Hiroshi Shimada

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-31 04:17
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/094; H03K19/0944; H03K19/09448; H03K19/0175; H03K19/017509; H03K19/017518

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 126 words
A level converter circuit for converting a first logic signal using a lower voltage supply as a base potential- into a second logic signal using a higher voltage supply as a base potential; said level converter circuit comprising an input terminal for receiving the first logic signal, an output terminal for outputting the second logic signal, a first bipolar transistor having a collector connected to the higher voltage supply, a second bipolar transistor connected between the higher voltage supply and the output terminal, the second bipolar transistor having a base con- . nected to an emitter of the first bipolar transistor, and means for turning on the second bipolar transistor or both bipolar transistors in response to the first logic signal applied to the input terminal.
Claim 2
Dependent Claim 126 words
A level converter circuit for converting a first logic signal using a lower voltage supply as a base potential- into a second logic signal using a higher voltage supply as a base potential; said level converter circuit comprising an input terminal for receiving the first logic signal, an output terminal for outputting the second logic signal, a first bipolar transistor having a collector connected to the higher voltage supply, a second bipolar transistor connected between the higher voltage supply and the output terminal, the second bipolar transistor having a base con- . nected to an emitter of the first bipolar transistor, and means for turning on the second bipolar transistor or both bipolar transistors in response to the first logic signal applied to the input terminal.
Claim 3
Dependent Claim 61 words
A level converter circuit according to claim 1, wherein said turning on means comprises a first MOS transistor connected in parallel with said first bipolar transistor, and a second MOS transistor connected between the base of the second bipolar transistor and the lower voltage supply, the second MOS transistor having a gate connected to a base of the second bipolar transistor.
Claim 4
Dependent Claim 18 words
A level converter circuit according to claim 2, wherein said first MOS transistor is a depression (depletion) typ
Claim 5
Dependent Claim 22 words
A level converter circuit according to claim 2, wherein said first MOS transistor and said second MOS transistor form a CMOS inverter.
Claim 6
Dependent Claim 23 words
A level converter circuit according to claim 1, which is incorporated with the output portion of a MOS type random access memory device.

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