Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
150 words
Data processing apparatus arranged to execute a native set of instructions defining a limited register address space and, inter alia, a register load operation and including a processor and more physical registers (32) than can be spanned by the register address space characterized in that there is incorporated a register access mechanism which associates a stack of physical registers with each address in the register address space and includes (a) a load indicator (53) designating, for each stack, the register of that stack next to be loaded; (b) an access indicator (46) designating, for each stack, the register of that stack next to be accessed; and (c) a discriminator unit (59) determining tentatively, for each register load operation, if actual loading is required and, if so, to set the access indication for the appropriate stack to the current load indication for that stack, else to reset the access indication appropriately.
Claim 2
Dependent Claim
150 words
Data processing apparatus arranged to execute a native set of instructions defining a limited register address space and, inter alia, a register load operation and including a processor and more physical registers (32) than can be spanned by the register address space characterized in that there is incorporated a register access mechanism which associates a stack of physical registers with each address in the register address space and includes (a) a load indicator (53) designating, for each stack, the register of that stack next to be loaded; (b) an access indicator (46) designating, for each stack, the register of that stack next to be accessed; and (c) a discriminator unit (59) determining tentatively, for each register load operation, if actual loading is required and, if so, to set the access indication for the appropriate stack to the current load indication for that stack, else to reset the access indication appropriately.
Claim 3
Dependent Claim
123 words
Data processing apparatus as claimed in claim 1 wherein the load indicator (53) comprises a stored table corresponding to each stack storing a pointer directed uniquely at each register in that stack together with a pointer assign control (99) for each table addressed by instruction register addresses (via 93) and accessing the table entries in cyclic order, the access indicator (46) comprising a single table storing one pointer directed at each stack and addressed by instruction register addresses (via 70, 71 or 72) and connected to both the output of the load indicator (53) and the discriminator unit (59) whereby the currently addressed access indicator table entry can be set either to the output of the load indicator or of the discriminator unit.
Claim 4
Dependent Claim
50 words
Data processing apparatus as claimed in claim 2 wherein the discriminator unit (59) comprises an associative store automatically loaded, in response to each register load instruction resulting in an actual load, with some of the source addresses involved, in the search field, and the target register pointer, in result field.
Claim 5
Dependent Claim
68 words
Data processing apparatus as claimed in any preceding claim wherein the load operation is continued even though the discriminator unit determines an actual load is not required, the fetched load being compared with the tentatively identified contained load for validation or completion of the full load operation, the processor being arranged to invalidate all operations, if any, dependent on, or subsequent to, a detected invalidly tentatively contained load.