Patent EP0057563A2 successfully refreshed from Google Patents.
EP0057563A2
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EP
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Semiconductor integrated circuit
Assignee: AT&T Inc
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Filing: 1982-01-27
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Granted: —
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Expires: 2002-01-27
Abstract
Abstract In a CMOS integrated circuit certain high-impedance nodes are particularly susceptible to noise signals from the power supply. The power supply noise rejection is improved by using transistors 72, 74 of one type only, which are formed in tubs, such as N-channel transistors formed in P-type tubs in an N-type substrate, for connection to the critical high-impedance nodes 76. The tubs of these transistors are preferably connected (via 70) to an on-chip regulated power supply 66, 68. Noise rejection is further improved by grounded tubs underlying any conductive runners 80, 82 and capacitors 84 connected to the critical nodes 76.
Inventors
- 👤 Bhupendra Kumar Ahuja
- 👤 Mirmira Ramarao Dwarakanath
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-29 18:45
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/211; H10D89/213; G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/462; G05F1/467
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
78 words
A semiconductor integrated circuit including field-effect transistors of both N-channel and P-channel types, the transistors of one type being formed in tubs (14) in a semiconductor substrate (16), the tubs (14) being of opposite conductivity type from the substrate (16), and One or more high-impedance nodes (76), characterised in that the only transistors (72,74) having source or drain regions directly connected to any of the said one or more high-impedance nodes (76) are of the said one type.
Claim 2
Dependent Claim
78 words
A semiconductor integrated circuit including field-effect transistors of both N-channel and P-channel types, the transistors of one type being formed in tubs (14) in a semiconductor substrate (16), the tubs (14) being of opposite conductivity type from the substrate (16), and One or more high-impedance nodes (76), characterised in that the only transistors (72,74) having source or drain regions directly connected to any of the said one or more high-impedance nodes (76) are of the said one type.
Claim 3
Dependent Claim
52 words
An integrated circuit as claimed in claim 1 wherein the tubs (14) of those transistors (72, 74) that have source or drain regions directly connected to any of the said one or more high-impedance nodes (76) are connected (70) to a regulated power supply (66,68) forming a part of the integrated circuit.
Claim 4
Dependent Claim
64 words
An integrated circuit as claimed in claim 1 or claim 2 including conductive runners (50,80,82) overlying the substrate (16) and connected to high-impedance nodes, tubs (86) in the substrate (16) under at least a portion of the runners (50), the tubs (86) being of opposite conductivity type from the substrate (16), and means (88,90) connecting the last-mentioned tubs to a point of reference potential.
Claim 5
Dependent Claim
69 words
An integrated circuit as claimed in any of the preceding claims including one or more capacitors (52, 56, 54; 84) overlying the substrate (16) and connected to high-impedance nodes, tubs (86) in the substrate (16) under at least a portion of the capacitors (52,56,54), the tubs (86) being of opposite conductivity type from the substrate (16), and means (88,90) connecting the last-mentioned tubs to a point of reference potential.
Claim 6
Dependent Claim
29 words
An integrated circuit as Claimed in any of the preceding claims wherein the said one or more high-impedance nodes (76) are inputs of one or more operational amplifiers (78).
Claim 7
Dependent Claim
33 words
An integrated single-chip pulse code modulation coder/decoder with filters as claimed in any of the preceding claims wherein the said one or more high-impedance nodes are summing nodes of a switched capacitor filter.
Claim 8
Dependent Claim
49 words
An integrated circuit as claimed in any of the preceding claims wherein the substrate (16) is N-type, the tubs (14,86) are P-type and the transistors of the said one type are N-channel transistors each having N + - type source and drain regions (10,12) in a P-type tub (14).
References Cited (Backward Citations)
No citation records indexed.
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