Abstract Apparatus for for writing into variable-length fields in words stored in a computer memory has the memory words organised into bytes each of a specified number of bits. The word containing the starting address of the variable-length field is accessed from memory together with the next succeeding memory word. The offset of the leading bit of the variable field is added to the field length by an adder (148) so as to determine the beginning and end of the variable field, and a decoderltranslator (230) determines the bytes in which the beginning and end of the field are located. Byte-masking circuits (226) mask those bytes which are not to be re-written, and allow writing into those bytes that are to be fully written. For the bytes which are to be partially written, starting and trailing bit decoderltranslators (200,206) determine which bits are to be masked in the partially written bytes and apply corresponding signals to byte masking latches (214, 224). A carry signal from the address adder (148) indicates that the partial field crosses a word boundary and toggles a word selecting circuit (250) accordingly. Since the circuits are organised to operate on a pair of consecutive words they can handle partial fields from one bit up to a full memory word length even when this involves crossing the boundary between words.
Apparatus for writing into variable-length fields in words stored in a computer memory, in which the variable-length field is specified by its starting address (A) and length (L), the apparatus having means (250) for addressing the memory to obtain the word containing the starting address, characterised in that the words (Figure 4) are organised in bytes each consisting of a specified number of bits means (148) is provided for computing the address (B) of the trailing bits of a word which are not to be written byte-masking means (226) is arranged to mask those bytes not to be written and to permit the writing of those bytes which are to be wholly written, and bit-masking means (204) is arranged to mask those bits not to be written within the partially-written bytes.
Claim 2
Dependent Claim
131 words
Apparatus for writing into variable-length fields in words stored in a computer memory, in which the variable-length field is specified by its starting address (A) and length (L), the apparatus having means (250) for addressing the memory to obtain the word containing the starting address, characterised in that the words (Figure 4) are organised in bytes each consisting of a specified number of bits means (148) is provided for computing the address (B) of the trailing bits of a word which are not to be written byte-masking means (226) is arranged to mask those bytes not to be written and to permit the writing of those bytes which are to be wholly written, and bit-masking means (204) is arranged to mask those bits not to be written within the partially-written bytes.
Claim 3
Dependent Claim
67 words
Apparatus for writing into variable-length fields according to claim 1 in which, at each partial write operation, the memory-addressing means (250) addresses both the word containing the starting address of the partial write field and the next consecutive memory word, and both words are presented to the masking means (204, 226), thereby allowing writing in a single operation into a partial-write field which crosses a word boundary.
Claim 4
Dependent Claim
77 words
Apparatus for writing into variable-length fields according to claim 2 in which the means for computing the address (B) of the trailing bits comprises an adder (148) adding the offset portions of the starting address (A) and length (L) of the variable field, the carry from which provides a signal indicating that the variable field crosses a word boundary, and toggles a word-selecting circuit (250) to enable the masking circuits to operate on the next consecutive word.
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