Electronic circuit interconnection system

Claim 2

An electronic circuit interconnection system comprising substrate means having a plurality of circuit path means arranged in spaced electrically insulated relation to each other and electronic semiconductor means mounted on the substrate means electrically interconnected with the circuit path means, characterized in that the semiconductor'means have portions formed of inorganic material having selected thermal expansion properties and have conductive means which are electrically and thermally connected to the circuit path means, and the substrate means has portions of metal layer means defining said circuit path means'and has electrically insulat-' ing inorganic means coated on said metal layer portions and fused to be bonded to the metal layer portions to secure the circuit path means in said spaced electrically insulated relation to each other, the metal layer means and inorganic coating means being selected and proportioned relative to each other to provide the substrate means with thermal expansion properties corresponding to those of the semiconductor means to maintain the integrity of the electrical connection of said conductive means to said circuit path means during temperature cycling of the system and to provide the substrate means with thermal conductivity sufficient to maintain semiconductor means at safe temperatures during system operation.

Claim 3

An electronic circuit interconnection system comprising a substrate means having a plurality of circuit path means arranged in spaced electrically insulated relation to each ' other and electronic semiconductor means mounted on the substrate means and electrically interconnected with the circuit path means, characterized in that the semiconductor means have portions formed of inorganic material having selected thermal expansion properties and carry metal conductors which are fixedly connected in electrically and thermally conducting relation to the circuit path means, and the substrate means has portions of metal layer means defining said circuit path means embedded in electrically insulating inorganic means for securing the circuit path means in said spaced electrically insulated relation to each other, the metal layer means and the inorganic embedding means being selected and proportioned relative.to each other to provide the substrate means with thermal expansion' properties corresponding to those of the semiconductor means to maintain the integrity of the fixed electrical connections of the metal conductors to the circuit path means during temperature cycling of the system and to provide the substrate means with thermal conductivity sufficient to maintain the semiconductor means at safe temperatures during system operation.-

Claim 4

An electronic circuit interconnection system comprising a substrate means having a plurality of circuit path means arranged in spaced electrically insulated relation to each ' other and electronic semiconductor means mounted on the substrate means and electrically interconnected with the circuit path means, characterized in that the semiconductor means have portions formed of inorganic material having selected thermal expansion properties and carry metal conductors which are fixedly connected in electrically and thermally conducting relation to the circuit path means, and the substrate means has portions of metal layer means defining said circuit path means embedded in electrically insulating inorganic means for securing the circuit path means in said spaced electrically insulated relation to each other, the metal layer means and the inorganic embedding means being selected and proportioned relative.to each other to provide the substrate means with thermal expansion' properties corresponding to those of the semiconductor means to maintain the integrity of the fixed electrical connections of the metal conductors to the circuit path means during temperature cycling of the system and to provide the substrate means with thermal conductivity sufficient to maintain the semiconductor means at safe temperatures during system operation.-

Claim 5

An electronic circuit interconnection system as set forth in claim 2 wherein said semiconductor means comprises an integrated circuit unit having an integrated circuit embodied in a chip of semiconducting silicon material and having terminals on the chip for electrically connecting the chip circuit with other circuit means, said metal conductors being fixedly bonded to said terminals and to the circuit path means on the substrate means.

Claim 6

An electronic circuit interconnection system as set forth in claim 3 wherein the integrated circuit chip is mounted on a ceramic chip-carrier having said metal conductors bonded to the chip-carrier to extend between the terminals and the circuit path means on the substrate means.

Claim 7

An electronic circuit interconnection system as set forth in claim 3 wherein the integrated circuit chip is mounted on a pliable tape having said metal conductors bonded to the tape to extend between the terminals and the circuit path means on the substrate means.

Claim 8

An electronic circuit interconnection system as set forth in claim 3 wherein the integrated circuit chip is mounted on a metal lead frame, said metal conductors comprise frame leads which are bonded to said circuit path means on the substrate means, and additional conductors are bonded to the chip terminals and to the frame leads for electrically connecting the integrated circuit of the chip to the frame leads.

Claim 9

An electronic circuit interconnection system as set forth in claim 3 wherein the integrated circuit unit is a flip-chip unit having said terminals located on one side of the chip, and wherein said metal conductors comprise solder connections fixedly connecting the chip terminals to the circuit path means on the substrate means.

Claim 10

An electronic circuit interconnection system as . set forth in claim 3 wherein said integrated circuit chip is mounted directly on said metal layer means in heat-transfer relation thereto and said metal conductors are bonded to the chip terminals and to the circuit path means on the substrate means.

Claim 11

An electronic circuit interconnection system as set forth in claim 2 having glass frit means fused in situ to selected portions of the metal layer means defining said circuit path means to secure the circuit path means in said spaced electrically insulated relation'to each other and to cooperate with the metal layer means to provide the substrate means with said thermal expansion properties corresponding to those of said semiconductor means.

Claim 12

An electronic circuit interconnection system as set forth in claim 9 wherein the metal layer means/comprises a metal layer having one side embedded in the fused glass means and having an opposite side exposed from the embedding giass means, the semiconductor means being mounted directly on said opposite layer side and having said metal conductors thereof fixedly bonded to said opposite layer side to be in close heat-transfer relation to the metal layer.

Claim 13

ll. An electronic circuit interconnection system as set forth in claim 9 wherein said metal layer means defining said circuit path means comprises a layer of metal having both sides thereof embedded in said glass means, the embedding glass means having openings therein receiving said metal conductors for electrically and thermally connecting the conductors to the metal layer.

Claim 14

An electronic circuit interconnection system as set forth in claim 9 wherein said metal layer means defining said circuit path means comprises a plurality of metal layers secured in spaced stacked relation to each other by said fused glass means.

Claim 15

An electronic circuit interconnection system as set forth in claim 12 wherein a first one of said metal layers defines said circuit path means and a second one of the layers is secured to the first layer to support and supplement the heat-sink properties of the first layer.

Claim 16

An electronic circuit interconnection-system as set forth in claim 13 wherein said first metal layer has an opening of substantial size therein, and the second metal layer has a platform portion thereof elevated from the general plane of the second layer to extend into said large opening, at least one of the semiconductor means being mounted on the platform in close heat-transfer relation to the second layer.

Claim 17

An electronic circuit interconnection system as set forth in claim 9 wherein the metal layer means includes a first metal layer defining at least some of said circuit path means, and having said glass first means fused to one side of said metal layer, the system having an electrical circuit component electrically connected to selected circuit path means to extend therebetween for cooperating with the semiconductor means in forming a bybird circuit.

Claim 18

An electronic circuit interconnection system as set forth in claim 15 having additional glass frit means fused over said circuit component for encapsulating the component in said substrate means.

Claim 19

An electronic circuit interconnection system as set forth in claim 15 wherein said circuit component comprises a material having high electrical resistance which is fused in . situ to the substrate means.

Claim 20

An electronic circuit interconnection system as set forth in claim 2 wherein the metal layer means defining the circuit path means comprises at least one composite metal laminate, the laminate having a plurality of layers of different metal materials bonded together to cooperate with said inorganic means to provide the substrate means with.said thermal expansion and said thermal conductivity properties.

Claim 21

An electronic circuit interconnection system as set forth in claim 18 wherein said metal laminate includes a layer of metal of relatively high thermal conductivity and a layer of metal of relatively low thermal expansion properties.

Claim 22

An electronic circuit interconnection system as set forth in claim 18 wherein an outer layer of the laminate is formed of a metal material having relatively high bondability with respect to fused glass and the embedding means comprises glass means fused to said outer laminate layer.

Claim 23

An electronic circuit intcerconncection system as set forth in claim 18 wherein corresponding layers of the metal laminate are disposed symmetrically relative to the central plane of the laminate for assuring that the circuit path means defined by the laminated tend to remain flat during thermal cycling thereof.

Claim 24

An electronic circuit interconnection system as set forth in claim 19 wherein said metal laminate has a central layer of a copper material of relatively-high thermal and electrical conductivity and has outer metal layers of equal thickness of an iron alloy material of relatively low thermal expansior, properties, and wherein the embedding'means comprises glass means fused to at least one of the outer layers of the laminate.

Claim 25

.An electronic circuit interconnection system as set forth in claim 22.wherein the iron alloy material is selected from the group of alloys having a nominal composition by weight of from about 36 to 50 percent nickel and the balance iron, of about 31 percent nickel, 8 percent chromium, 8 percent cobalt and the balance iron, of about 32 percent nickel, 15 percent cobalt, 1 percent molybdenum and the balance iron, of about . 38 percent nickel, 7 percent chromium and the balance iron, of about 17 percent chromium and the balance iron, of about 16.5 percent chromium, 4.5 percent aluminum, and the balance iron, of about 57 percent cobalt, 9 percent chromium and the balance iron, and of about 23 to 30 percent nickel, about 17 to 30 percent cobalt about 0.6 to 0.8 percent manganese and the balance iron.

Claim 26

An electronic circuit interconnection system comprising a substrate having a plurality of circuit paths arranged in spaced electrically insulated relation to each other and having a plurality of electronic semiconductor units mounted on the substrate electrically interconnected with the circuit paths, characterized in that the semiconductor units each have an integrated circuit embodied in a chip of semiconducting silicon material, have terminals on the chip for electrically connecting the chip circuit with other circuit means, have a ceramic chip carriei mounting the chip thereon, and have metal conductors electrically connected to the chip terminals and bonded to selected.portions of the chip carrier, and the substrate embodies a composite metal laminate having a plurality of portions thereof defining the circuit paths and has glass'means embedding those laminate portions for securing the circuit paths in said spaced electrically insulated relation to each other, the laminate portions each having a central layer of a copper material of relatively high electrical. and thermal conductivity and each having outer layers of iron alloy material of relatively low coefficient of thermal expansion metallurgically bonded to opposite sides of the central layer, the semiconductor carriers being mounted on the substrate with the metal conductors thereof fixedly secured in thermally and electrically conductive relation to said circuit paths, and a glass means being fused to iron alloy layers of the laminate and being proportioned relative to said laminate portions to provide the substrate with thermal expansion properties corresponding to those of the semiconductor units to maintain the integrity of the fixed connections of the unit conductors to the circuit paths during temperature cycling of the system and to provide the substrate with thermal conductivity sufficient to maintain the plurality of semiconductor units at safe temperatures on the substrate during system operation.

Claim 27

An electronic circuit interconnection system comprising a substrate having a plurality of circuit paths arranged in spaced electrically insulated relation to each other and having a plurality of electronic semiconductor units mounted on the substrate electrically interconnected with the circuit paths, characterized in that the semiconductor units each have an integrated circuit embodied in a chip of semiconducting silicon material, have terminals on the chip for electrically connecting the chip circuit with other circuit means, have a ceramic chip carriei mounting the chip thereon, and have metal conductors electrically connected to the chip terminals and bonded to selected.portions of the chip carrier, and the substrate embodies a composite metal laminate having a plurality of portions thereof defining the circuit paths and has glass'means embedding those laminate portions for securing the circuit paths in said spaced electrically insulated relation to each other, the laminate portions each having a central layer of a copper material of relatively high electrical. and thermal conductivity and each having outer layers of iron alloy material of relatively low coefficient of thermal expansion metallurgically bonded to opposite sides of the central layer, the semiconductor carriers being mounted on the substrate with the metal conductors thereof fixedly secured in thermally and electrically conductive relation to said circuit paths, and a glass means being fused to iron alloy layers of the laminate and being proportioned relative to said laminate portions to provide the substrate with thermal expansion properties corresponding to those of the semiconductor units to maintain the integrity of the fixed connections of the unit conductors to the circuit paths during temperature cycling of the system and to provide the substrate with thermal conductivity sufficient to maintain the plurality of semiconductor units at safe temperatures on the substrate during system operation.

Claim 28

An electronic circuit interconnection system as set forth in claim 24 wherein said portions of the metal laminate each have one side embedded in said fused glass means and have an opposite side exposed from the embedding glass means, and respective chip carriers are mounted on selected ones of the laminate portions on said opposite sides thereof and have said metal conductors thereof fixedly bonded to others of said metal laminate portions in close heat-transfer relation to the laminate material.

Claim 29

An electronic circuit interconnection system as set forth in claim 25 having additional metal layer means embedded in said glass means and secured in stacked relation to the composite metal laminate by said glass means.

Claim 30

.27. An electronic circuit interconnection system as set forth in claim 26 wherein the additional metal layer means define other circuit paths, and metal conductors extend through openings in the fused glass means electrically interconnecting circuit paths on the laminate and on the additional metal layer means.

Claim 31

An electronic circuit interconnection system as set forth in claim 27 wherein the additional metal layer means includes a layer of metal having both sides thereof embedded in said glass means

Claim 32

A substrate for mounting electronic semiconductor means comprising metal layer means having portions thereof . defining circuit path means and inorganic means embedding the layer means therein for securing the circuit path means in spaced electrically insulated relation to each other, the metal layer means including at least one composite metal laminate having a plurality of layers of different metal materials bonded together to cooperate with the inorganic embedding means to provide the substrate with selected thermal expansion and conductivity properties, whereby semiconductors means having portions formed of inorganic materials and having metal conductors thereon are adapted to be mounted on the substrate and electrically interconnected with the circuit path means with improved reliability and service life.

Claim 33

A substrate for mounting electronic semiconductor means comprising metal layer means having portions thereof . defining circuit path means and inorganic means embedding the layer means therein for securing the circuit path means in spaced electrically insulated relation to each other, the metal layer means including at least one composite metal laminate having a plurality of layers of different metal materials bonded together to cooperate with the inorganic embedding means to provide the substrate with selected thermal expansion and conductivity properties, whereby semiconductors means having portions formed of inorganic materials and having metal conductors thereon are adapted to be mounted on the substrate and electrically interconnected with the circuit path means with improved reliability and service life.

Claim 34

A substrate as set forth in claim 29 wherein the laminate has one layer of metal of relatively high thermal con-ductivity and a layer of metal of relatively low coefficient of thermal expansion.

Claim 35

A substrate as set forth in claim 30 wherein corresponding layers of the laminate are symmetrically disposed relative to the central plane of the laminate for assuring that the circuit path means defined by the laminate tend to remain flat during thermal cycling thereof.

Claim 36

A substrate as set forth in claim 30 wherein the inorganic embedding means comprise glass frit means fused to selected portions of the metal layer means defining said circuit path means and wherein an outer layer of the metal laminate is formed of a metal material having relatively high bondability relative to the fused glass means.

Claim 37

A substrate as set forth in claim 32 wherein the laminate has a central layer of a copper material of relatively high thermal electrical conductivity and has outer metal layers of an iron alloy material having relatively low thermal expansion properties and having high bondability relative to said glass embedding means.

Claim 38

A substrate as set forth in claim 32 wherein the iron alloy material is selected from the group of alloys having a nominal composition by weight of from about 36 to 50 percent nickel and the balance iron, of about 31 percent nickel, 8 percent chromium, 18 percent cobalt and the balance iron, of about 32 percent nickel, 15 percent cobalt, 1 percent molybdenum and the balance iron, of about 38 percent nickel, 7 percent chromium and the balance iron, of about 17 percent chromium and the balanc iron, of about 16.5 percent chromium, 4.5 percent aluminum, and the balance iron, of about 57 percent cobalt, 9 percent chromium and the balance iron, and of about 23 to 30 percent nickel, 17 to 30 percent cobalt, 0.6 to 0.8 percent manqanese and the balance iron.

Claim 39

A substrate as set forth in claim 32 wherein the metal, layer means includes a layer of metal having one side embedded in said glass means and having an opposite side exposed from the embedding glass for mounting the semiconductor means thereon.

Claim 40

. 36. A substrate as 'set forth in claim 32 wherein.the metal layer means includes a layer of metal having both sides thereof embedded in said glass means, the glass means having openings therein for permitting electrical connection to circuit path means defined by the metal layer means.

Claim 41

A substrate as set forth in claim 32 wherein said metal layer means comprise a plurality of metal layers secured in spaced stacked relation to each other by the fused glass means.