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EP0052465A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

I2L semiconductor device

Assignee: Toshiba Corp
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Filing: 1981-11-04
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Granted: —
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Expires: 2001-11-04
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Abstract

Abstract A semiconductor device includes a linear circuit section including a vertical npn transistor (TR4) and an I 2 L circuit section including a set of an injector pnp transistor (TR6) and an inverter npn transistor (TR5), these transistors being formed on the same wafer (30, 36) as for the vertical transistor (TR4). The inverter and injector transistors (TR5, TR6) are both lateral transistors.

Inventors

  • 👤 Masashi Ikeda

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-31 15:46
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/65; H10D84/658; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/091

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 70 words
A semiconductor device comprising a linear circuit section including at least one vertical transistor ( TR 4) and an I 2 L circuit section including at least one set of injector transistor (TR6) and inverter transistor (T R 5) which are formed on the same wafer on which said vertical transistor is formed, characterized in that said injector and inverter transistors (TR6, TR5) are each formed of a lateral transistor.
Claim 2
Dependent Claim 70 words
A semiconductor device comprising a linear circuit section including at least one vertical transistor ( TR 4) and an I 2 L circuit section including at least one set of injector transistor (TR6) and inverter transistor (T R 5) which are formed on the same wafer on which said vertical transistor is formed, characterized in that said injector and inverter transistors (TR6, TR5) are each formed of a lateral transistor.
Claim 3
Dependent Claim 79 words
A semiconductor device according to claim 1, wherein said wafer includes: a semiconductor substrate (30) of one conductivity type; first and second semiconductor regions (32, 34) of opposite conductivity type formed in a surface region of said semiconductor substrate (30); and a semiconductor layer (36) of the opposite conductivity type formed on said semiconductor substrate (30) and first and second semiconductor regions (32, 34) and having a lower impurity concentration than said first and second semiconductor regions (32, 34).
Claim 4
Dependent Claim 63 words
A semiconductor device according to claim 2, wherein the vertical transistor in said linear circuit includes: a third semiconductor region (38) of said one conductivity type formed in a surface region of said semiconductor layer (36) and constituting a base region; and a fourth semiconductor region (40) of the opposite conductivity type formed in said third semiconductor region and constituting an emitter region.
Claim 5
Dependent Claim 47 words
A semiconductor device according to claim 2 or 3, wherein the lateral transistor in said I 2 L circuit section includes fifth and sixth semiconductor regions (50, 52) of said one conductivity type formed in a surface region of said semiconductor layer (26) to face each other.
Claim 6
Dependent Claim 73 words
A semiconductor device according to claim 4, wherein the inverter lateral transistor in said I 2 L circuit section includes: a seventh semiconductor region (60) of the opposite conductivity type formed in said sixth semiconductor region (50); and an eighth semiconductor region (62, 49) of the opposite conductivity type formed partly in said sixth semiconductor region (52) to face said seventh semiconductor region (60) and electrically coupled to said second semiconductor region (34).
Claim 7
Dependent Claim 42 words
A semiconductor device according to claim 5, wherein said sixth semiconductor region (52, 58) has an impurity concentration lower in its portion intervening between said seventh and eighth semiconductor regions (60, 62) than in its portion facing said fifth semiconductor region (50).
Claim 8
Dependent Claim 67 words
A semiconductor device according to claim 6, wherein said eighth semiconductor region includes a first portion facing said second semiconductor region (60) and a second portion (49) electrically coupled to said second semiconductor region (34) and extending from the surface of said semiconductor layer (36) to said second semiconductor region (34) to co-operate with said second semiconductor region (34) to surround said fifth to seventh semiconductor regions.
Claim 9
Dependent Claim 36 words
A semiconductor device according to claim 6, wherein said eighth semiconductor region (49) extends from the surface of said semiconductor layer (36) to said second semiconductor region (34) and surrounds said fifth to seventh semiconductor regions.
Claim 10
Dependent Claim 67 words
A semiconductor device according to claim 5, wherein said eighth semiconductor region includes a first portion facing said second semiconductor region (60) and a second portion (49) electrically coupled to said second semiconductor region (34) and extending from the surface of said semiconductor layer (36) to said second semiconductor region (34) to co-operate with said second semiconductor region (34) to surround said fifth to seventh semiconductor regions.
Claim 11
Dependent Claim 67 words
A semiconductor device according to claim 5, wherein said eighth semiconductor region includes a first portion facing said second semiconductor region (60) and a second portion (49) electrically coupled to said second semiconductor region (34) and extending from the surface of said semiconductor layer (36) to said second semiconductor region (34) to co-operate with said second semiconductor region (34) to surround said fifth to seventh semiconductor regions.

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