Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
210 words
A semiconductor integrated circuit device having a high tolerance of abnormal, high input voltages, comprising a semiconductor substrate (4) of one conductivity type, an input electrode (10) formed on the semiconductor substrate (4), a first MIS transistor (T2) formed on the semiconductor substrate (4) constituting an input stage of the semiconductor integrated circuit device and including a first source region (30) and a first drain region (31) both of opposite conductivity type to the substrate, the first source (30) region or the first drain region (31) being electrically connected to the input electrode (10), and a second MIS transistor (T2) formed on the semiconductor substrate (4) constituting an internal circuit of the semiconductor integrated circuit device and including a gate electrode (1), a second source region (5), and a second drain region (6), both of opposite conductivity type to the substrate (4), the gate electrode (1) being electrically connected to whichever of the first source region (30) and the first drain region (31) is not connected to the input electrode (10), characterised in that whichever of the first source region (30) or the first drain region (31) is connected to the input electrode (10), has a depth greater than the depth of the second source (5) or drain region (6).
Claim 2
Dependent Claim
210 words
A semiconductor integrated circuit device having a high tolerance of abnormal, high input voltages, comprising a semiconductor substrate (4) of one conductivity type, an input electrode (10) formed on the semiconductor substrate (4), a first MIS transistor (T2) formed on the semiconductor substrate (4) constituting an input stage of the semiconductor integrated circuit device and including a first source region (30) and a first drain region (31) both of opposite conductivity type to the substrate, the first source (30) region or the first drain region (31) being electrically connected to the input electrode (10), and a second MIS transistor (T2) formed on the semiconductor substrate (4) constituting an internal circuit of the semiconductor integrated circuit device and including a gate electrode (1), a second source region (5), and a second drain region (6), both of opposite conductivity type to the substrate (4), the gate electrode (1) being electrically connected to whichever of the first source region (30) and the first drain region (31) is not connected to the input electrode (10), characterised in that whichever of the first source region (30) or the first drain region (31) is connected to the input electrode (10), has a depth greater than the depth of the second source (5) or drain region (6).
Claim 3
Dependent Claim
86 words
A semiconductor integrated circuit device according to claim 1, further characterised in that it includes a diffusion region (12) of opposite conductivity type to the substrate functioning as a resistor, connected between the input electrode (10) and the first source (30) or or drain region (31), the tolerance voltage of a junction between this diffusion region (12) and the semiconductor substrate (4) being lower than the tolerance voltage of whichever of the first source (30) or drain region (31) is connected to the input electrode (10).
Claim 4
Dependent Claim
20 words
A semiconductor integrated circuit device according to claim 2, wherein the diffusion region is formed by doping with arsenic ions.
Claim 5
Dependent Claim
52 words
A semiconductor integrated circuit device according to claim 1 or 2, wherein the first source (30) or drain region (31) connected to the input electrode (10) is formed by doping with phosphorus atoms, whereas the second source region (5) and the second drain region (6) are formed by doping with arsenic atoms.
Claim 6
Dependent Claim
53 words
A semiconductor integrated circuit device according to claim 4, wherein the input electrode comprises a first electrical contact (10) contacting an end of the diffusion region (12) and the first source (30) or drain region (31) is connected to a second electrical contact (22) to the other end of the diffusion region (12).
Claim 7
Dependent Claim
55 words
A semiconductor integrated circuit device according to any one of the preceding claims, wherein, the depth of the first source (30) or drain region (31) connected to the input electrode (10) is more than one micrometer, and the maximum depth of the second source region (5) and the second drain region (6) is 0.5 micrometers.