Patent EP0041770A2 successfully refreshed from Google Patents.
EP0041770A2
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EP
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A programmable read-only-memory element and method of fabrication thereof
Assignee: Texas Instruments Inc
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Filing: 1981-04-23
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Granted: —
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Expires: 2001-04-23
Abstract
Abstract A programmable read-only-memory (PROM) element is disclosed in which an N-type epitaxial layer, grown on a P-type substrate with an N + buried layer therebetween, has a P-type anode region formed in a surface portion thereof. An N-type poly-silicon layer is formed on the surface ofthe anode region, generally within an aperture in an insulating layer, with the dopant of the poly-silicon layer being diffused downwardly into the anode region to form a shallow N-type cathode region. A metal layer is deposited on the surface of the poly-silicon layer over the anode region, and a low resistivity path is provided to the buried layer. To program the memory element, a positive potential is applied to the metal layer relative to the buried layer to break down the barrier between the cathode and anode regions. As the reverse current flow heats the poly-silicon. the metal alloys through the poly-silicon and the cathode region, and shorts to the anode region.
Inventors
- 👤 Glen Gray Possley
- 👤 Earl Cecil Wilson
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-08 15:37
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/14; G11C17/16; H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/491
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
55 words
A programmable read-only-memory element comprising: a silicon base of a first conductivity type; a first region of a second conductivity type formed in a surface portion of the base; a silicon layer of the first conductivity type on a portion of the surface of the first region; and a metal layer over said silicon layer.
Claim 2
Dependent Claim
55 words
A programmable read-only-memory element comprising: a silicon base of a first conductivity type; a first region of a second conductivity type formed in a surface portion of the base; a silicon layer of the first conductivity type on a portion of the surface of the first region; and a metal layer over said silicon layer.
Claim 3
Dependent Claim
29 words
The memory element of claim 1 further comprising: a second region of the first conductivity type formed in a surface portion of the first region beneath the silicon layer.
Claim 4
Dependent Claim
21 words
The memory element of claim 1 or 2 wherein the silicon layer is of polycrystalline silicon of said first conductivity type.
Claim 5
Dependent Claim
15 words
4 . The memory element of claim 1 wherein the metal layer is primarily aluminium.
Claim 6
Dependent Claim
30 words
The memory element of claim 1 comprising: an insulating layer on the surface of the base surrounding the portion of the silicon layer on the surface of the first region.
Claim 7
Dependent Claim
57 words
The memory element of claim 1 wherein the silicon base comprises: a silicon substrate of the second conductivity type; an epitaxial layer of silicon of the first conductivity type on a major surface of the substrate; and a low resistivity region of the first conductivity type formed along the junction of the eiptaxial layer and the substrate.
Claim 8
Dependent Claim
90 words
A programmable read-only-memory element comprising: a silicon base of a first conductivity type; a first region of a second conductivity type formed in a surface portion of the base ; a second region of the first conductivity type formed in a surface portion of the first region; an insulating layer on said surface, having an aperture which exposes at least a portion of the surface of the second region; a silicon layer on the surface of the second region within said aperture; and a metal layer over said silicon layer.
Claim 9
Dependent Claim
90 words
A programmable read-only-memory element comprising: a silicon base of a first conductivity type; a first region of a second conductivity type formed in a surface portion of the base ; a second region of the first conductivity type formed in a surface portion of the first region; an insulating layer on said surface, having an aperture which exposes at least a portion of the surface of the second region; a silicon layer on the surface of the second region within said aperture; and a metal layer over said silicon layer.
Claim 10
Dependent Claim
19 words
The memory element of claim 7 wherein the silicon layer is of polycrystalline silicon of said first conductivity type.
Claim 11
Dependent Claim
14 words
The memory element of claim 7 or 8 wherein the'metal layer is primarily aluminium.
Claim 12
Independent Claim
54 words
A method for fabricating a programmable read-only-memory element comprising the steps of: forming a first region of a first conductivity type in a surface portion of a silicon base of a second conductivity type; forming a silicon layer of the second conductivity type on a portion of the surface of the first region; and
Claim 13
Independent Claim
54 words
A method for fabricating a programmable read-only-memory element comprising the steps of: forming a first region of a first conductivity type in a surface portion of a silicon base of a second conductivity type; forming a silicon layer of the second conductivity type on a portion of the surface of the first region; and
Claim 14
Dependent Claim
8 words
forming a metal layer over said silicon layer.
Claim 15
Dependent Claim
8 words
forming a metal layer over said silicon layer.
Claim 16
Dependent Claim
30 words
The method of claim 10 further comprising the step of: forming a second, region of the second conductivity type in a surface portion of the first region-beneath the silicon layer.
Claim 17
Dependent Claim
47 words
The method of claim 9 wherein the step of forming the silicon layer comprises the steps of: depositing a polycrystalline silicon layer on at least a portion of the surface of the first region; and implanting said silicon layer with a dopant of said second conductivity type.
Claim 18
Dependent Claim
38 words
The method of claim 12 further comprising the step of: diffusing some of the dopant implanted in said silicon layer downward into the surface of said first region to form a second region of said second conductivity type.
References Cited (Backward Citations)
No citation records indexed.
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