Self balancing modulator and its application in a chroma demodulator

Claim 2

A self balancing modulator having an input and output including an input differential amplifier adapted to receive an analog input signal supplied at one input and a bias potential supplied at a second input thereof, a first switching circuit adapted to receive a first switching signal supplied thereto, the switching circuit being coupled between a load and the differential outputs of the input differential amplifier for commutating output currents from the input differential amplifier to said load in response to the first switching signals, the load being coupled to the output of the modulator, characterized by: a pair of transistor gating switches (106, 108) having respective collector-emitter paths coupled in series between the differential outputs of the input differential amplifier and respective resistors (112, 114), the base electrodes of said pair of transistors being adapted to receive a control signal for shunting the output currents through said resistors; a feedback circuit (104) having respective inputs coupled to said resistors and an output, said output being adapted to be coupled to a charge storage device (102) and the input differential amplifier at the second input thereof, said feedback circuit providing an output signal for varying the charge stored by said charge storage device in accordance with the voltage developed across said resistors such that the bias potential equalizes the output currents from the input differential amplifier to null said output signal-when said control signal is supplied and the analog input signal is set to a nominal zero setting.

Claim 3

The self balancing modulator of claim 1 characterized by said feedback circuit including .a differential amplifier (120) having differential inputs and outputs; said inputs being coupled, to a respective one of said pair of resistors; and a current mirror circuit (124) coupled to said outputs of said differential amplifier to provide said output signal at an output of said feedback circuit to said charge storage device.

Claim 4

The self balancing modulator of claim 2 characterized further by: a second switching circuit (202) adapted to receive a second switching signal, said second switching circuit being coupled between the outputs of the input differential amplifier and the first switching circuit for commutating said differential output currents from the input differential amplifier to the first switching circuit during normal operation; and a third switching circuit (224, 226) adapted to receive the second switching signal and being coupled between said differential amplifier outputs and said current mirror circuit for commutating the output currents therefrom to said current mirror circuit in synchronism with the second switching circuit.

Claim 5

The self balancing modulator of claim 3 characterized by each of said switching circuits comprising first and second transistor pairs, each of said transistor pairs including first and second transistors differentially connected at respective emitters with the collectors of the first transistors of each transistor pair being interconnected, the collectors of the second transistors of each transistor pair being interconnected, the bases of the first transistor of the first transistor pair being interconnected with the base of the second transistor of the second transistor pair to a first terminal, the bases of the second and first transistors of the first and second transistor pair respectively being interconnected at a second terminal, and the respective switching signal being . applied to the first and second terminal of respective switching circuits.

Claim 6

For a chroma demodulator section of a television receiver, a self balancing modulater having an input adapted to receive an analog signal, and an output at which is provided a modulated output signal, the self balancing modulator including an input differential amplifier having first and second inputs and first and second outputs, the first input being coupled to the input of the modulator the second input adapted to receive a bias potential, and a first switching circuit coupled between a load and the first and second outputs of the input differential amplifier, the first switching circuit being adapted to receive a first switching signal for commutating the differential currents flowing in the outputs of the input differential amplifier through the load, the load being coupled to the output of the modulator such that the analog signal appears thereat modulated by the first switching signal, characterized in that the self balancing modulator includes a second switching circuit (202) receiving a second switching signal and being coupled between the outputs of the input differential amplifier and the first switching circuit; a first (106) and second (108) gating transistor, the collector-emitter paths of said first and second gating transistor being connected, respectively, in series between first and second outputs of said second switching circuit and respective resistors, the bases of said first and second gating transistor being coupled to a terminal at which is supplied a gating pulse whereby the differential currents from the input differential amplifier are shunted to respective resistors when said first and second gating transistors are rendered conductive by said gating pulses; and a feedback circuit (104) having first and second inputs and an output, said inputs coupled respectively to said resistors, said output being coupled to the second input of said input differential amplifier, said feedback circuit being rendered active in response to a differential bias signal developed across said resistors when said first and second gating transistors are rendered conductive to vary the bias potential to the second input of the input differential amplifier in order to null the output signal during the interval gating pulses are supplied to the self balancing modulator and the analog signal is set at a . nominal zero level.

Claim 7

For a chroma demodulator section of a television receiver, a self balancing modulater having an input adapted to receive an analog signal, and an output at which is provided a modulated output signal, the self balancing modulator including an input differential amplifier having first and second inputs and first and second outputs, the first input being coupled to the input of the modulator the second input adapted to receive a bias potential, and a first switching circuit coupled between a load and the first and second outputs of the input differential amplifier, the first switching circuit being adapted to receive a first switching signal for commutating the differential currents flowing in the outputs of the input differential amplifier through the load, the load being coupled to the output of the modulator such that the analog signal appears thereat modulated by the first switching signal, characterized in that the self balancing modulator includes a second switching circuit (202) receiving a second switching signal and being coupled between the outputs of the input differential amplifier and the first switching circuit; a first (106) and second (108) gating transistor, the collector-emitter paths of said first and second gating transistor being connected, respectively, in series between first and second outputs of said second switching circuit and respective resistors, the bases of said first and second gating transistor being coupled to a terminal at which is supplied a gating pulse whereby the differential currents from the input differential amplifier are shunted to respective resistors when said first and second gating transistors are rendered conductive by said gating pulses; and a feedback circuit (104) having first and second inputs and an output, said inputs coupled respectively to said resistors, said output being coupled to the second input of said input differential amplifier, said feedback circuit being rendered active in response to a differential bias signal developed across said resistors when said first and second gating transistors are rendered conductive to vary the bias potential to the second input of the input differential amplifier in order to null the output signal during the interval gating pulses are supplied to the self balancing modulator and the analog signal is set at a . nominal zero level.

Claim 8

The self balancing modulator of claim 5 characterized by said feedback circuit including a differential amplifier having first and second inputs and outputs said first and second inputs being coupled to respective ones of said resistors; a current mirror circuit coupled to the first and second outputs of said differential amplifier for deriving the bias potential at said output of said feedback circuit.

Claim 9

The self balancing modulator of claim 6 characterized by said feedback circuit characterized further by including a third switching circuit adapted to receive said second switching signal and being coupled between said first and second outputs of said differential amplifier and said current mirror for commutating differential output currents from said differential amplifier to said current mirror in synchronism with second switching circuit.

Claim 10

The self balancing modulator of claim 7 wherein said output of said current mirror circuit is coupled to a capacitor across which the bias potential is provided.