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EP0033149A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Switch matrix apparatus for satellite-switched TDMA system or the like

Assignee: NEC Corp
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Filing: 1981-01-23
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Granted: —
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Expires: 2001-01-23
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Abstract

Abstract The switch matrix apparatus may be used, for example, in SS-TDMA or FDMA systems in relay stations where a plurality of stations carry on the communications with each other arbitrarily via the relay stations. This switch matrix apparatus (4) comprises M distributing means (201-20M) for distributing an input signal applied thereto into N signals wherein M and N are positive integers; N combining means (301-30N) for combining the respective distributing outputs of said M distributing means (201-20M) to a signal, respectively, said N combining means (301-30N) respectively including a current combining means using resistances and a low input impedance circuit to be connected to the output of said current combining means; and M x N switching circuit means (11 to MN) connected respectively between the outputs of said M distributing means (201-20M) and the inputs of said N combining means (301-30N), said M x N switching circuit means (11 to MN) respectively having a switch means with a high input impedance and a low output impedance. In this switch matrix apparatus the impedance matching among circuits is easily achieved even if there are long connection distances between the circuits; the impedance matching may be unnecessary if the distances are short with small losses caused thereby. Furthermore, the switch matrix apparatus may have high speed, compact, light weight and low power consumption characteristics, and flexibility against the change in the number of the input/output signals.

Inventors

  • 👤 Ryokichi Saga
  • 👤 Yukio Takimoto

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-07 08:21
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/60; H03K17/62; H04; H04B; H04B7/00; H04B7/14; H04B7/15; H04B7/204; H04B7/2046; H04Q; H04Q11/00; H04Q11/04; H04Q2213/00; H04Q2213/1302; H04Q2213/1304; H04Q2213/13291; H04Q2213/13292; H04Q2213/13306; H04Q2213/13333; Y; Y02; Y02D; Y02D30/00; Y02D30/70

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 139 words
A switch matrix apparatus (4) comprising: a) M distributing means (201-20M) for distributing an input signal applied thereto into N signals, wherein M and N are positive integers; b) N combining means (301-30N) for combining the respective distributing outputs of said M distributing means (201-20M) to a signal, respectively, said N combining means (301-30N) respectively including a current combining means using resistances (181-18M) and a low input impedance circuit (33j, 34j, 43j) to be connected to the output of said current combining means; and c) M x N switching circuit means (11 to MN) connected respectively between the outputs of said M distributing means (201-20M) and the inputs of said N combining means (301-30N), said M x N switching circuit means (11 to MN) respectively having a switch means with a high input impedance and a low output impedance.
Claim 2
Dependent Claim 139 words
A switch matrix apparatus (4) comprising: a) M distributing means (201-20M) for distributing an input signal applied thereto into N signals, wherein M and N are positive integers; b) N combining means (301-30N) for combining the respective distributing outputs of said M distributing means (201-20M) to a signal, respectively, said N combining means (301-30N) respectively including a current combining means using resistances (181-18M) and a low input impedance circuit (33j, 34j, 43j) to be connected to the output of said current combining means; and c) M x N switching circuit means (11 to MN) connected respectively between the outputs of said M distributing means (201-20M) and the inputs of said N combining means (301-30N), said M x N switching circuit means (11 to MN) respectively having a switch means with a high input impedance and a low output impedance.
Claim 3
Dependent Claim 32 words
A switch matrix apparatus as claimed in Claim 1, characterised in that the M x N switching circuit means (11 to MN) respectively includes an emitter follower switch circuit (i1 to iN).
Claim 4
Dependent Claim 28 words
A switch matrix apparatus as claimed in Claims 1 or 2, characterised in that the distributing means (201-20M) comprises a high input impedance and a low output impedance.
Claim 5
Dependent Claim 23 words
A switch matrix apparatus as claimed in Claim 3, characterised in that the distributing means (20i) is composed of an emitter follower circuit.
Claim 6
Dependent Claim 23 words
A switch matrix apparatus as claimed in Claim 3, characterised in that the distributing means (20i r ) comprises resistances (151 to 15N).
Claim 7
Dependent Claim 31 words
A switch matrix apparatus as claimed in any of Claims 1 to 5, characterised in that the low input impedance circuit of the combining means (30j) is a grounded-base amplifier circuit.
Claim 8
Dependent Claim 33 words
A switch matrix apparatus as claimed in any of Claims 1 to 5, characterised in that the low input impedance circuit of the combining means (30j') is a grounded-emitter type feed-back amplifier circuit.
Claim 9
Dependent Claim 26 words
A switch matrix apparatus as claimed in any of Claims 1 to 7, characterised in that the switching circuit (ij) is connected in a multiple cascade.

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