Patent EP0031583A2 successfully refreshed from Google Patents.
EP0031583A2
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EP
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A driver circuit for charge coupled device
Assignee: Toshiba Corp
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Filing: 1980-12-22
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Granted: —
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Expires: 2000-12-22
Abstract
Abstract A driver circuit for charge coupled device comprising a CMOS inverter (01, Q2) including two complementary MOS transistors (01, Q2) being adapted to be connected at the output terminal to a charge coupled device; charge circuit (Q1, C L including the transistor (01) and a load capacitor (C L ) of charge coupled device; discharge circuit (Q2, Q3, C L ) including the transistors (Q2, Q3) and the load capacitor (C L ) of the charge coupled device; and control means (Vc) for controlling the gate voltage of the transistor (Q3) to control the time constant of the discharge circuit (Q2, Q3, C L ).
Inventors
- 👤 Ryuzo Shiraki
- 👤 Seizi Watanabe
- 👤 Toshio Yuyama
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 17:05
CPC Classifications
G; G11; G11C; G11C19/00; G11C19/28; G11C19/282; G11C19/285; H; H03; H03K; H03K5/00; H03K5/01; H03K5/02; H03K5/023; H03K17/00; H03K17/12; H03K17/122; H03K19/00; H03K19/003; H03K19/00346; H03K19/00361; H03K6/00; H03K6/04; H04; H04N; H04N25/00; H04N25/70; H04N25/71; H04N25/745
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
88 words
A driver circuit for charge coupled device comprising a CMOS inverter including two complementary MOS transistors for inverting a level of an input pulse signal, said CMOS inverter being adapted to be connected at the output terminal to a charge coupled device; charge circuit means including a load capacitor of said charge coupled device; discharge circuit means including the load capacitor of said charge coupled device; and control means for controlling a time constant of at least one of said charge circuit means and said discharge circuit means.
Claim 2
Dependent Claim
88 words
A driver circuit for charge coupled device comprising a CMOS inverter including two complementary MOS transistors for inverting a level of an input pulse signal, said CMOS inverter being adapted to be connected at the output terminal to a charge coupled device; charge circuit means including a load capacitor of said charge coupled device; discharge circuit means including the load capacitor of said charge coupled device; and control means for controlling a time constant of at least one of said charge circuit means and said discharge circuit means.
Claim 3
Dependent Claim
53 words
A driver circuit according to claim 1 wherein at least one of said discharge and charge circuit means further includes a MOS transistor series-connected to said load capacitor, and said control means controls a gate voltage of the MOS transistor of said at least one circuit means to control a mutual conductance thereof.
Claim 4
Dependent Claim
52 words
A driver circuit according to claim 1 wherein at least one of said discharge and charge circuit means includes two paths parallel-connected, each comprising a MOS transistor, and said control means controls a gate voltage of the MOS transistor of said at least one circuit means to control a mutual conductance thereof.
Claim 5
Dependent Claim
90 words
A driver circuit according to claim 1 wherein at least one of said discharge and charge circuit means includes two paths parallel connected each including a MOS transistor, said control means controls a gate voltage of the MOS transistor of said at least one circuit means to control a mutual conductance thereof, and an analog switch is further provided which is controlled by the input pulse signal to connect a control signal from said control means to the gate of said MOS transistor of said at least one circuit means.
Claim 6
Dependent Claim
56 words
A driver circuit according to claim 1 wherein at least one of said discharge and charge circuit means includes a plurality of paths each including a MOS transistor, and said control means controls a gate voltage of the MOS transistor of said at least one circuit means to control an operation timing of the MOS transistor.
Claim 7
Dependent Claim
51 words
A driver circuit according to claim 1 wherein at least one of said discharge and charge circuit means includes two paths each including a MOS transistor, and said control means controls the source voltage of the MOS transistor of said at least one circuit means to change a mutual conductance thereof.
Claim 8
Dependent Claim
52 words
A driver circuit according-to claim 1 wherein at least one of said discharge and charge circuit means includes an analog switch through which a current flows, the analog switch being controlled by an input signal applied to the driver circuit, and said control means controls the DC level of an output pulse.
Claim 9
Dependent Claim
37 words
A driver circuit for charge coupled device according to claim 1 wherein said charge circuit means includes one of said two complementary MOS transistors, and said control means controls the substrate voltage of said one MOS transistor.
Claim 10
Dependent Claim
74 words
A driver circuit according to claim 1 wherein at least one of said discharge and charge circuit means includes a plurality of paths parallel-connected each including a series circuit of switch means and a MOS transistor, and said control means controls said switch means so that the value of W/L of the MOS transistors is changed to control a mutual conductance thereof, where W and L denote a channel width and channel length, respectively.
Claim 11
Dependent Claim
38 words
A driver circuit according to claim 1 wherein at least one of said discharge and charge circuit means includes one of said two complementary MOS transistors and a variable resistor connected in series to said one MOS transistor.
Claim 12
Dependent Claim
35 words
A driver circuit according to claim 1 wherein at least one of said discharge and charge circuit means includes a plurality of paths parallel-connected each including a series circuit of switch means and a resistor.
Claim 13
Dependent Claim
40 words
A driver circuit according to claim 1 wherein at least one of said discharge and charge circuit means includes two paths one of which including a variable capacitor, said capacitor means controls said variable capacitor to charge the capacitance thereof.
Claim 14
Dependent Claim
35 words
A driver circuit according to claim 1 wherein at least one of said discharge and charge circuit means includes a plurality of paths parallel-connected each including a series circuit of switch means and a capacitor.
References Cited (Backward Citations)
No citation records indexed.
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