Patent EP0029334A1 successfully refreshed from Google Patents.
EP0029334A1
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Series-connected combination of two-terminal semiconductor devices and their fabrication
Assignee: UK Secretary of State for Defence
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Filing: 1980-11-11
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Granted: —
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Expires: 2000-11-11
Abstract
Abstract A method of fabricating a series-connected combination of two-terminal semiconductor devices on a common substrate comprising: forming a layer of high quality semiconductor material, 4, on the surface of a temporary substrate, 2 and 3, to provide active areas for the devices, forming first contact pattern conductors, 6, 9, 10, on the free surface of the high quality semiconductor layer to provide a separate first contact to this layer for each of the devices, bonding an insulating support substrate, 12, to the first contact pattern, removing the temporary substrate, forming second contact pattern conductors, 17, 18, 19, on the other surface of the high quality layer to provide a separate second contact to this layer for each of the devices, removing regions, 8, of the high quality layer separating the conductors of a pattern at any stage after beginning formation of the first contact pattern in order to define the device active areas so that parts of the first contact pattern are exposed when both the temporary substrate and the said regions of the high quality layer have been removed, and providing interconnections between the exposed parts, 10, of the first contact pattern and parts of the second contact pattern, whereby to connect the devices in series. Also any series-connected combination of two-terminal semiconductor devices fabricated according to the inventive method.
Inventors
- 👤 Geoffrey Ball
- 👤 Harry Alexander Deadman
- 👤 John Graham Smith
- 👤 John Charles Vokes
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 08:17
CPC Classifications
H; H10; H10P; H10P72/00; H10P72/70; H10P72/74; H10P54/00; H10W; H10W40/00; H10W40/20; H10W40/25; H10W40/254; H10W90/00; H10P72/743; H10P72/7432; Y; Y10; Y10S; Y10S257/00; Y10S257/926; Y10S438/00; Y10S438/977
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
194 words
A method of fabricating a series-connected combination of two-terminal semiconductor devices on a common substrate comprising: forming a layer of high quality semiconductor material on the surface of a temporary substrate to provide active areas for the devices, forming first contact pattern conductors on the free surface of the high quality semiconductor layer to provide a separate first contact to this layer for each of the devices, bonding an insulating support substrate to the first contact pattern, removing the temporary substrate, forming second contact pattern conductors on the other surface of the high quality layer to provide a separate second contact to this layer for each of the devices, removing regions of the high quality layer separating the conductors of a pattern at any stage after beginning formation of the first contact pattern in order to define the device active areas, so that parts of the first contact pattern are exposed when both the temporary substrate and the said regions of the high quality layer have been removed, and prividing interconnections between the exposed parts of the first contact pattern and parts of the second contact pattern, whereby to connect the devices in series.
Claim 2
Independent Claim
194 words
A method of fabricating a series-connected combination of two-terminal semiconductor devices on a common substrate comprising: forming a layer of high quality semiconductor material on the surface of a temporary substrate to provide active areas for the devices, forming first contact pattern conductors on the free surface of the high quality semiconductor layer to provide a separate first contact to this layer for each of the devices, bonding an insulating support substrate to the first contact pattern, removing the temporary substrate, forming second contact pattern conductors on the other surface of the high quality layer to provide a separate second contact to this layer for each of the devices, removing regions of the high quality layer separating the conductors of a pattern at any stage after beginning formation of the first contact pattern in order to define the device active areas, so that parts of the first contact pattern are exposed when both the temporary substrate and the said regions of the high quality layer have been removed, and prividing interconnections between the exposed parts of the first contact pattern and parts of the second contact pattern, whereby to connect the devices in series.
Claim 3
Dependent Claim
41 words
A method as claimed in claim 1 wherein, at any stage prior to bonding the insulating support substrate to the first contact pattern, a metallic pattern is formed on the surface of the support for bonding to the first contact pattern.
Claim 4
Independent Claim
51 words
A method as claimed in either of the preceding claims wherein at any stage prior to removal of the regions of the high quality layer separating a contact pattera conductors, the devices are isolated from each other by rendering semi-insulating the regions of high quality layer separating the device active areas.
Claim 5
Dependent Claim
90 words
A method as claimed in claim 3 wherein the first contact pattern conductors are formed in two stages, the first stage comprising formation of discrete contacts for each of the devices and overlying each device's active area and the second stage comprising forming for each device a contact pad portion overlying an area of both the discrete contact and an adjacent semi-insulating isolated region such that removal of the regions separating the contact pattern conductors produces a hole through the isolated region through which the contact pad portion is exposed.
Claim 6
Dependent Claim
66 words
A method as claimed in claim 3 or claim 4 wherein the regions of the high quality layer separating device active areas are isolated by bombardment of the layer with an ion beam at any stage following formation of at least one of the contact patterns, the conductors of the contact pattern lying across the beam path at the time of irradiation serving as a mask.
Claim 7
Independent Claim
213 words
A method of fabricating a series-connected combination of two-terminal semiconductor devices on a common substrate comprising fabricating a first precursor by the following procedure: forming a layer of high quality semiconductor material on the surface of a temporary substrate to provide active areas for the devices, forming first contact pattern conductors on the free surface of the high quality semiconductor layer to provide a separate first contact to this layer for each of the devices thereon, bonding an insulating support substrate overlaid by a conducting interconnection pattern to the first contact pattern so as to provide contact between the first and the interconnection patterns, removing the temporary substrate, forming second contact pattern conductors on the other surface of the high quality layer to provide a separate second contact to this layer for the devices thereon at any stage after high quality semiconductor layer formation, removing regions of this layer which separate a contact patterns conductors so as to form isolated regions sandwiched between the first and second contact pattern conductors, fabricating a second precursor by the same procedure as that used for the first precursor, bonding the first and second precursors together so as to provide contact between the second contact pattern of the one and the interconnection contact pattern of the other.
Claim 8
Independent Claim
213 words
A method of fabricating a series-connected combination of two-terminal semiconductor devices on a common substrate comprising fabricating a first precursor by the following procedure: forming a layer of high quality semiconductor material on the surface of a temporary substrate to provide active areas for the devices, forming first contact pattern conductors on the free surface of the high quality semiconductor layer to provide a separate first contact to this layer for each of the devices thereon, bonding an insulating support substrate overlaid by a conducting interconnection pattern to the first contact pattern so as to provide contact between the first and the interconnection patterns, removing the temporary substrate, forming second contact pattern conductors on the other surface of the high quality layer to provide a separate second contact to this layer for the devices thereon at any stage after high quality semiconductor layer formation, removing regions of this layer which separate a contact patterns conductors so as to form isolated regions sandwiched between the first and second contact pattern conductors, fabricating a second precursor by the same procedure as that used for the first precursor, bonding the first and second precursors together so as to provide contact between the second contact pattern of the one and the interconnection contact pattern of the other.
Claim 9
Dependent Claim
46 words
A method as claimed in claim 6 wherein the removal of regions of the high quality semiconductor material layer is performed by etching mesas into this layer after formation of at least one of the patterns of contact conductors and using-a pattern as an etch mask.
Claim 10
Dependent Claim
45 words
A method as claimed in claim 6 or claim 7 wherein a layer of high quality semiconductor material is formed on the surface of a temporary substrate and divided into a first and a second portion for use in the first and second precursors respectively.
Claim 11
Independent Claim
20 words
A method as claimed in any preceding claim wherein the support substrate comprises a material having a high thermal conductivity.
Claim 12
Independent Claim
46 words
A method as claimed in any preceding claim wherein at least the region of the temporary substrate immediately adjacent to the high quality layer is removed by selective etching using an etchant which attacks the temporary substrate at a higher rate than the high quality layer.
Claim 13
Independent Claim
17 words
A method as claimed in any preceding claim wherein the temporary substrate comprises a multi-layer semiconductor structure.
Claim 14
Dependent Claim
35 words
A method as claimed in claim 11 wherein the temporary substrate comprises a semiconductor base layer with a semi- conductor buffer layer formed on its surface upon which the high quality layer is epitaxially grown.
Claim 15
Dependent Claim
55 words
A method as claimed in claim 12 wherein the base layer is removed by etching using an etchant which attacks this layer at a higher rate than the buffer layer and the buffer layer is removed by etching with an etchant which attacks the buffer layer at a higher rate than the high quality layer.
Claim 16
Dependent Claim
29 words
A method as claimed in claim 12 wherein the temporary substrate comprises a base layer of GaAs, the buffer layer comprises GaAlAs and the high quality layer comprises GaAs.
Claim 17
Dependent Claim
16 words
A series-connected combination of two-terminal semi- conductor devices fabricated according to any of the preceding claims.
Claim 18
Dependent Claim
19 words
A series-connected combination of diodes substantially as herein described with reference to the drawings (Figures 1, 2 and 3).
Claim 19
Dependent Claim
19 words
A series-connected combination of diodes substantially as herein described with reference to the drawings (Figures 1, 2 and 3).
Claim 20
Dependent Claim
18 words
A series-connected combination of diodes substantially as herein described with reference to the drawings (Figures 4 and 5).
Claim 21
Dependent Claim
18 words
A series-connected combination of diodes substantially as herein described with reference to the drawings (Figures 4 and 5).
References Cited (Backward Citations)
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