Abstract The memory modules of a computer are provided with means for checking the operation of the error-correcting circuits under program control. Field testing hitherto has been carried out by writing test patterns into the memory array but this is time-consuming and relies on the assumption that the memory array is operating correctly, which, in many cases, is unrealistic. The invention provides means whereby the circuits may be tested directly under software control. The invention provides mode setting means (31) by which the program is enabled to set one or more digits in a status register (21) in the memory module, placing it in a maintenance mode. In this mode transfer of data between the memory array (22) and the data register (27) is prevented, and the program is enabled to write into and read from the data register directly. Two digit positions of the status register (21) may be used, one of them (2 18 ) when set enabling the program to write into and read from data positions in a holding register within the data register (27), and the other when set enabling the program to write into the error code positions in that register. When neither digit is set, address instructions from the central processing unit (10) address the memory array (22) in the usual way.
A programmable computer having at least one processor (10) and at least one memory module (11) comprising a semiconductor memory array (22) and a data register (27), the data register including a holding register (600) holding data and error digits, and error-correcting circuits (601, 602) for generating error code digits for data to be written into, and for correcting errors in data being read from the memory array, characterised in that the module also includes settable means (305) which can be set in a maintenance mode to cause a read or write instruction to read from or to write into the holding register (600) instead of reading from or writing into a location in the memory array (22).
Claim 2
Dependent Claim
118 words
A programmable computer having at least one processor (10) and at least one memory module (11) comprising a semiconductor memory array (22) and a data register (27), the data register including a holding register (600) holding data and error digits, and error-correcting circuits (601, 602) for generating error code digits for data to be written into, and for correcting errors in data being read from the memory array, characterised in that the module also includes settable means (305) which can be set in a maintenance mode to cause a read or write instruction to read from or to write into the holding register (600) instead of reading from or writing into a location in the memory array (22).
Claim 3
Dependent Claim
44 words
A programmable computer according to claim 1 in which the memory module (11) includes a status register (21) characterised in that the settable means (305) comprises means holding at least one of the digits (2 18 , 2 19 ) of the states register.
Claim 4
Dependent Claim
40 words
A programmable computer according to claim 2 provided with manually operable maintenance switching means (Figure 3) which on operation sets up a maintenance mode in which the program is enabled to write the said digits into the status register (21).
Claim 5
Dependent Claim
96 words
A programmable computer according to claim 2 or claim 3 characterised in that the settable means (305) comprises two digit positions (2 18 , 2 19 ) of the status register (21) and the maintenance mode is such that on setting a first of the said digits (2 18 ) data may be written into or read from data bit positions (Figure 8a) of the holding register (600), and on setting the second of the said digits (2 19 ) data may be written into the error code positions (Figure 8b) of the holding register (600).
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