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Field effect transistor with stacked self-aligned gates and method for making it

Assignee: International Business Machines Corp
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Filing: 1978-11-17
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Granted: —
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Expires: 1998-11-17
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Abstract

Abstract Translated from French La présente invention concerne un transistor à effet de champ à portes superposées et son procédé de fabrication. Le transistor est essentiellement caractérisé en ce que la porte flottante (6) et la porte de commande (8) sont auto-alignées l'une avec l'autre et qu'en outre, elles sont auto-alignées avec les régions de source (12) et de drain (13). De préférence le matériau constitutif des portes est le silicium polycristallin. Le procédé de fabrication ne comprend que quatre étapes de masquage pour aboutir à la structure représentée. Ce transistor peut être utilisé dans les mémoires reprogrammables électriquement. The present invention relates to a field effect transistor with superimposed gates and its manufacturing process. The transistor is essentially characterized in that the floating gate (6) and the control gate (8) are self-aligned with each other and that in addition, they are self-aligned with the source regions ( 12) and drain (13). Preferably the constituent material of the doors is polycrystalline silicon. The manufacturing process only includes four masking steps to arrive at the structure shown. This transistor can be used in electrically reprogrammable memories.

Inventors

  • 👤 Tak H. Ning
  • 👤 Carlton M. Osburn
  • 👤 Hwa N. Yu

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-29 20:01
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/60; H10D64/66; H10D64/661; H10D30/00; H10D30/60; H10D30/68; H10D30/681; H10D64/01; H10D64/031; H10D64/035; H10P; H10P76/00; H10P76/40

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