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WO1997014289A2 Expired / Lapsed WO ⏱️ 0.0 years remaining

Protocol for communication with dynamic memory

Assignee: Rambus Inc
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Filing: 1996-10-18
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Granted: —
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Expires: 2016-10-18
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Abstract

Abstract A system and method for performing data transfers within a computer system is provided. The system includes a controller configured to dynamically adjust the interleave of the communications required to perform a series of data transfer operations to maximize utilization of the channel over which the communications are to be performed. The controller is able to vary the time interval between the transmission of control information that requests a data transfer and the performance of the data transfer by signaling the beginning of the data transfer with a strobe signal sent separate from the control information. The controller is able to defer the determination of how much data will be transferred in the operation by initiating the termination of a data transfer with a termination signal. The method provides a technique for distinguishing between identical control signals that are carried on the same line. The system includes a memory device with control circuitry that allows no more than one memory bank powered by any given power supply line to perform sense or precharge operations.

Inventors

  • 👤 Richard Maurice Barth
  • 👤 Frederick Abbot Ware
  • 👤 John Bradly Dillon
  • 👤 Donald Charles Stark
  • 👤 Craig Edward Hampel
  • 👤 Matthew Murdy Griffin

Bibliographic Details

Application Number —
Jurisdiction WO
Data Source google_patents
Last Synchronized 2026-10-30 21:39
CPC Classifications
G; G06; G06F; G06F12/00; G11; G11C; G11C7/00; G11C7/22; G06F13/00; G06F13/14; G06F13/16; G06F13/1605; G06F13/161; G11C5/00; G11C5/06; G11C5/066; G11C7/10; G11C7/1072; G11C8/00; G11C8/12

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