Digital bearing indicator

Claim 2

angle, where p and q are constants. 4. The apparatus of claim 3 wherein p

Claim 3

does not equal q and both p and q are integers and relatively prime.

Claim 4

The apparatus of claim 4 wherein: p=1; q=4; and N=16. 6. The apparatus of claim .[.1.]. .Iadd.32 .Iaddend.wherein said antenna array means comprises a plurality of N antenna elements equispaced about a circle in a

Claim 5

plane for receiving microwave energy. 7. The apparatus of claim .[.1.]. .Iadd.32 .Iaddend.or 6 wherein each of said antenna elements is a slot

Claim 6

antenna. 8. The apparatus of claim 7 wherein said slot antenna is a notch

Claim 7

antenna. 9. The apparatus of claim .[.1.]. .Iadd.32 .Iaddend.or 4 wherein said antenna array means comprises a disk of conductive material, said disk having a plurality of slots, each of said slots extending radially outward from a different point displaced from the center of the disk to the periphery thereof, the width of each slot monotonically increasing from the point to the periphery of the disk and means at each of the points for accepting microwave energy arriving in the slot from the

Claim 8

periphery of the disk. 10. The apparatus of claim 9 further comprising conductive ground plane means positioned between each point and the center

Claim 9

of the disk. 11. The apparatus of claim 9 further comprising microwave energy absorbing means positioned between each point and the center of the

Claim 10

disk. 12. The apparatus of claim 9 further comprising microwave energy

Claim 11

absorbing means positioned in a plane on one side of the disk. 13. The apparatus of claim .[.1.]. .Iadd.32 .Iaddend.or 4 wherein each of said phase comparator means comprises a two input-port correlator means, a servo-to-digital converter means connected to the output of said correlator means, and active connecting means for connecting said second

Claim 12

connecting means to the input ports of said correlator means. 14. The apparatus of claim 13 wherein said active connecting means comprises

Claim 13

bandpass amplifier means. 15. The apparatus of claim 13 wherein said active connecting means comprises mixer means having information-signal input means connected to said second connecting means, output means connected to the input ports of said correlator means and mixing signal input means, and local oscillator means for generating a mixing signal

Claim 14

connected to said mixing signal input means. 16. The apparatus of claim .[.1.]. .Iadd.32 .Iaddend.or 3 or 4 or 5 wherein each of said phase comparator means comprises means for generating a coded combination of binary level signals. .[.17. The apparatus of claim 16 wherein said ambiguity resolving means comprises means for converting coded combinations of binary level signals received in parallel from all of said phase comparator means into a binary representation of the bearing of the source of microwave energy..]. .[.18. The apparatus of claim 17 further comprising a source of a calibrating signal and wherein said ambiguity resolving means further comprises calibrating means responsive to said source of calibrating signals for initially modifying the coded combinations of binary level signals in accordance with the phase

Claim 15

errors..]. 19. The apparatus of claim .[.18.]. .Iadd.32 .Iaddend.wherein said calibrating means comprises a source of a calibrating signal, a controlled switching means for alternately connecting ports of said second connecting means to the inputs of said phase comparator means, first storing means for storing the coded combinations of binary level signals generated by said phase comparator means when said switching means is in a first position, second storing means for storing the coded combination of binary level signals generated by said phase comparator means when said switching means is in the alternate position, and arithmetic means for modifying the contents of said first storing means in view of the contents of said second storing means to produce a further coded combination of

Claim 16

binary level signals. 20. The apparatus of claim .[.18.]. .Iadd.32 .Iaddend.or 19 wherein said source of a calibrating signal is another

Claim 17

antenna means. 21. The apparatus of claim .[.18.]. .Iadd.32 .Iaddend.or 19 wherein said source of a calibrating signal is an output port of said

Claim 18

microwave power dividing and phase transforming means. 22. The apparatus of claim 19 further comprising means for controlling said switching means to periodically switch the connections to said phase comparator means.

Claim 19

The apparatus of claim 20 wherein the microwave energy is received in pulses and further comprising means responsive to the receipt of pulses of microwave energy for controlling said switching means to switch the

Claim 20

connections to said phase comparator means. 24. The apparatus of claim .[.18.]. .Iadd.32 .Iaddend.wherein said calibrating means comprises a source of at least one coded combinations of binary level signals representing a calibrating value, first storing means for storing the coded combinations of binary level signals generated by said phase comparator means, and arithmetic means for modifying the contents of said first storing means in view of the coded combination of binary level signals from said source to produce a further coded combination of binary

Claim 21

level signals. 25. The apparatus of claim 24 wherein said source is an addressable memory means storing a plurality of coded combinations of binary level signals, and means for selectively addressing said addressable memory means. .[.26. The apparatus of claim 1 further

Claim 22

comprising calibrating means..]. 27. The apparatus of claim .[.26.]. .Iadd.32 .Iaddend.wherein said phase comparator means comprises means for generating coded combinations of bits representing the differences in phase of received signals and wherein said calibrating means comprises a source of a coded combination of bits representing calibrating information, said source including first storing means for storing at least one coded combination of bits representing calibrating information, and arithmetic means for modifying a coded combination of bits generated by said phase comparator means in view of the contents of said first

Claim 23

storing means. 28. The apparatus of claim 27 further comprising a further storing means for storing a coded combination of bits and a controlled switching means having first and second inputs and outputs connected to said phase comparator means, and said source of a coded combination of bits representing calibrating information comprises a source of a calibrating signal, in-phase power dividing means having an input connected to said source of a calibrating signal and having m-output means, said switching means alternately connecting said second connecting means, connected to the second inputs thereof, or said m-output means connected to the first inputs thereof, to the inputs of said phase comparator means, said further storing means storing the coded combinations of bits generated by said phase comparator means when said switching means connects said second connecting means to the inputs of said phase comparator means, said first storing means storing the coded combination of bits generated by said phase comparator means when said switching means connects said m-output means to said phase comparator means, and said arithmetic means modifying the contents of said further storing means in view of the contents of said first storing means to

Claim 24

produce a further coded combination of bits. 29. The apparatus of claim 27 wherein said calibrating means comprises a source of a coded combination of bits representing calibrating information, said source including storing means for storing at least one coded combination of bits

Claim 25

representing calibrating information. 30. The apparatus of claim 29 wherein said storing means comprises a memory having a plurality of addressed storage registers, each of said register storing a different coded combination of bits and means for selectively addressing said

Claim 26

storage registers. 31. Apparatus for generating a representation of the bearing of a source of microwave energy comprising: an antenna array means having N antenna elements equispaced about an arc of a circle greater than 180° in a plane for receiving microwave energy, where N is an integer; microwave power dividing and phase transforming means having N input ports and a set of output ports; first connecting means for connecting each of the N input ports to a different one of said antenna elements, N being an integer greater than 4; n two-input port phase comparator means, each of said phase comparator means giving an indication of the phase difference between the signals arriving at their respective input ports, n being an integer less than N/2; second connecting means for connecting the input ports of each of said phase comparator means to a different pair of output ports of said microwave power dividing and phase transforming means; ambiguity resolving means connected to said n phase comparator means for processing said indications of the phase differences to give a multidigit representation of the bearing of a source of microwave energy; and calibrating means for compensating for phase errors introduced by said phase comparator means. .Iadd.32. Apparatus for generating a representation of the bearing of a source of microwave energy comprising: An antenna array means having N antenna elements equispaced about an arc of a circle greater than 180 degrees in a plane for receiving microwave energy, where N is an integer greater than 4; Microwave power dividing and phase transforming means having N input ports and a set of output ports; First connecting means for connecting each of the N input ports to a different one of said antenna elements; A processing means comprising n two-input port phase comparator means, each of said phase comparator means giving a coded combination of binary level signals representing an indication of the phase difference between the signals arriving at their respective input ports, n being an integer greater than 1 and less than N/2, and second connecting means for connecting the input ports of each of said phase comparator means to a different pair of output ports of said microwave power dividing and phase transforming means; and Ambiguity resolving means connected to said n phase comparator means for converting the coded combinations of binary level signals received in parallel from all said phase comparator means into a multi-digit representation of the bearing of a source of microwave energy, said ambiguity resolving means further comprising calibrating means for initially modifying the coded combinations of binary level signals in accordance with the phase errors introduced by said processor means. .Iaddend.