Differential dc amplifier
Abstract
Abstract 1. IN A TRANSISTOR DIFFIERENTIAL AMPLIFIER HAVING: A FIRST AND A SECOND CONNECTION MEANS FOR CONNECTION TO A POTENTIAL BIAS SOURCE, A PAIR OF INPUT TRANSISTORS FOR RECEIVING AN IMPUT SIGNAL BETWEEN THE BASE ELECTRODES THEREOF, AND A COMMON MODE NEGATIVE FEEDBACK PATH, SAID PATH INCLUDING A NEGATIVE FEEDBACK RESISTOR CONNECTED TO SAID SECOND CONNECTION MEANS, THE IMPROVEMENT COMPRISING: A PAIR OF DYNAMIC LOAD TRANSISTORS EACH HAVING THE EMITTER-COLLECTOR CIRCUITS THEREOF CONNECTED IN SERIES WITH THE EMITTER-COLLECTOR CIRCUITS OF A DIFFERENT ONE FOR SAID INPUT TRANSISTORS AND CONNECTED THROUGH A VARIABLE RESISTANCE TO SAID FIRST CONNECTION MEANS, A BIAS RESISTOR CONNECTED BETWEEN SAID FIRST CONNECTION MEANS AND SAID NEGATIVE FEEDBACK RESISTOR TO THEREBY PROVIDE A NEGATIVE FEEDBACK BIAS LOOP, AND MEANS CONNECTING THE BASE ELECTRODES OF SAID DYNAMIC LOAD TRANSISTORS IN PARALLEL WITH EACH OTHER AND TO SAID BIAS RESISTOR.
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Bibliographic Details
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1975-05-09 | 1975-11-08 | 1976-05-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-05-09 | 1979-11-08 | 1980-05-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-05-09 | 1983-11-08 | 1984-05-09 | $7700.00 | Window Closed / Lapsed |