USH965H
Expired / Lapsed
US
⏱️ 0.0 years remaining
Differential amplifier with digitally controlled gain
Assignee: AT&T Inc
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Filing: 1990-01-26
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Granted: 1991-09-03
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Expires: 2010-01-26
Abstract
Abstract Differential amplifier having multiple stages, each stage having the gain thereof set by digital control. The gain of each stage is individually controlled, thereby allowing wide dynamic range and gain. Each stage has a differential pair with multiple sets of gain-setting resistors in the emitters of the pair. By selecting which resistor set, or combination of resistor sets, is used, the gain of the stage is controlled. The result is a 4 stage, 0-45 dB gain amplifier for RF or IF applications, with the gain adjustable in 3 dB increments.
Inventors
- 👤 Paul C. Davis
- 👤 Scott L. Forgues
- 👤 Iconomos A. Koullias
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 15:11
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/001
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
90 words
An amplifier having a plurality of gain stages connected in tandem, the gain of each stage being controlled by digital input signals, each gain stage characterized by: at least one transistor having multiple emitters; a plurality of resistors, coupling to corresponding emitters; and, means, coupling to the plurality of resistors, for enabling current through selected ones of the plurality of resistors in response to the digital input signals; wherein the gain of the gain stage is substantially determined by the resistances of the plurality of resistors having current flowing therein.
Claim 2
Dependent Claim
90 words
An amplifier having a plurality of gain stages connected in tandem, the gain of each stage being controlled by digital input signals, each gain stage characterized by: at least one transistor having multiple emitters; a plurality of resistors, coupling to corresponding emitters; and, means, coupling to the plurality of resistors, for enabling current through selected ones of the plurality of resistors in response to the digital input signals; wherein the gain of the gain stage is substantially determined by the resistances of the plurality of resistors having current flowing therein.
Claim 3
Dependent Claim
20 words
The amplifier as recited in claim 1, wherein the means is a plurality switched current sources corresponding to the resistors.
Claim 4
Dependent Claim
15 words
The amplifier as recited in claim 2, wherein the gain stages are differential gain stages.
Claim 5
Dependent Claim
157 words
A differential amplifier, disposed in an integrated circuit, having differential inputs, differential outputs, and digitally selectable gain, characterized by: first and second transistors, each having an input and first and second outputs, the inputs coupling to corresponding differential inputs of the gain stage and first outputs coupling to differential outputs of the gain stage; first and second load resistors, having substantially equal resistances, coupling to corresponding collectors of first and second transistors; a plurality of pairs of gain-setting resistors, the resistors in each pair having substantially equal resistances, each resistor of each pair coupling to corresponding second outputs of the first and second transistors, for setting the gain of the gain stage; and, switched current sources for selectively conducting current from the corresponding pair of gain-setting resistors; wherein the gain of the stage is determined substantially by the ratio of the resistance of the load resistors to the combined resistance of the gain-setting resistors having current therein.
Claim 6
Dependent Claim
157 words
A differential amplifier, disposed in an integrated circuit, having differential inputs, differential outputs, and digitally selectable gain, characterized by: first and second transistors, each having an input and first and second outputs, the inputs coupling to corresponding differential inputs of the gain stage and first outputs coupling to differential outputs of the gain stage; first and second load resistors, having substantially equal resistances, coupling to corresponding collectors of first and second transistors; a plurality of pairs of gain-setting resistors, the resistors in each pair having substantially equal resistances, each resistor of each pair coupling to corresponding second outputs of the first and second transistors, for setting the gain of the gain stage; and, switched current sources for selectively conducting current from the corresponding pair of gain-setting resistors; wherein the gain of the stage is determined substantially by the ratio of the resistance of the load resistors to the combined resistance of the gain-setting resistors having current therein.
Claim 7
Dependent Claim
26 words
The differential amplifier as recited in claim 4, wherein the first and second transistors have multiple emitters and the gain-setting resistors couple to the corresponding emitters.
Claim 8
Dependent Claim
20 words
The differential amplifier as recited in claim 5, wherein only one of the switched current sources operates at a time.
Claim 9
Dependent Claim
32 words
The differential amplifier as recited in claim 5, further characterized by a buffer amplifier disposed between the differential outputs of the amplifier and the first outputs of the first and second transistors.
Claim 10
Dependent Claim
16 words
The differential amplifier as recited in claim 7, wherein the buffer amplifier is an emitter follower.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-09-02 | 1995-03-04 | 1995-09-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-09-02 | 1999-03-04 | 1999-09-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-09-02 | 2003-03-04 | 2003-09-03 | $7700.00 | Window Closed / Lapsed |