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Electronic warfare software system design an integrated approach

Assignee: United States Department of the Air Force
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Filing: 1985-12-20
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Granted: 1988-02-02
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Expires: 2005-12-20
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Abstract

Abstract An electronic warfare software system design for an electronic counter measures system is presented which includes two general purpose processors (GPP) and multiple special purpose processors (SPP). The GPPs are the system controllers. These GPPs transmit setup data, including time information or hardware item and all related tasks for that function or hardware item. The SPPs are not required to handle multiple tasks and therefore do not require high complexity design. Also the complexity of the GPPs is reduced. The requirements of the system could be met by each SPP, keyed off a central clock strobe, with the resources of the processor dedicated to satisfying that function's time critical needs. In the two GPP setup the GPPs retain central control as well as completing overhead type tasks. There is one central executive control function that allocates tasks to be done to each of the processors. All the SPPs are addressable by either of the GPPs and the GPPs share an instruction and data memory fetch arbitrator.

Inventors

  • 👤 Louis P. Butler

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 20:57
CPC Classifications
G; G01; G01S; G01S7/00; G01S7/02; G01S7/38

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 192 words
A multi-processor control system for controlling an electronic counter measure system which includes a receiver for receiving detected signals, a transmitter for transmitting jamming signals, and a display, said multi-processor control system comprising: a plurality of special purpose processors which operate in parallel to generate waveforms for the transmitter and direct transmission of specific jamming signals, said plurality of special purpose processors also controlling the receiver so that it can continue to receive the detected signals; a first general purpose processor which centrally controls the electronic counter measure system by receiving said detected signals, which are relayed to it by one of the special purpose processors, said first general purpose processor determining an identification of an appropriate jamming waveform and sending identification signals and transmitter control signals to another of the special purpose processors to direct transmission of an appropriate jamming signal, said first general purpose processor performing parallel processing with said plurality of special purpose processors which effectively uses idle time and allows time sensitive tasks to be performed in real time; and a memory means which receives and stores all signals coming to and from said first general purpose processor.
Claim 2
Dependent Claim 192 words
A multi-processor control system for controlling an electronic counter measure system which includes a receiver for receiving detected signals, a transmitter for transmitting jamming signals, and a display, said multi-processor control system comprising: a plurality of special purpose processors which operate in parallel to generate waveforms for the transmitter and direct transmission of specific jamming signals, said plurality of special purpose processors also controlling the receiver so that it can continue to receive the detected signals; a first general purpose processor which centrally controls the electronic counter measure system by receiving said detected signals, which are relayed to it by one of the special purpose processors, said first general purpose processor determining an identification of an appropriate jamming waveform and sending identification signals and transmitter control signals to another of the special purpose processors to direct transmission of an appropriate jamming signal, said first general purpose processor performing parallel processing with said plurality of special purpose processors which effectively uses idle time and allows time sensitive tasks to be performed in real time; and a memory means which receives and stores all signals coming to and from said first general purpose processor.
Claim 3
Dependent Claim 173 words
A multi-processor control system, as defined in claim 1, wherein said plurality of special purpose processors includes: a first special purpose processor which receives said identification signals and transmitted control signals from said first general purpose processor and generating waveforms for the transmitter in response thereto, said first special purpose processor controlling the transmitter in parallel with operation of other special purpose processors and operation of the first general purpose processor; a second special purpose processor which receives and relays detected signals from the receiver to the memory means and the first general purpose processor, said second special purpose processor also receiving a receiver control signal from the first general purpose processor which it uses to control the receiver so that it continues to receive the detected signals in a parallel operation with the other special purpose processors and the general purpose processor; and a third special purpose processor which receives data stored in said memory means and directs said display to present said data to users of said electronic counter measure system.
Claim 4
Dependent Claim 116 words
A multi-processor control system, as defined in claim 2, including a second general purpose processor which receives and performs signal analysis on said detected signals from said memory means, said second general purpose processor extracting and identifying therefrom characteristics of the detected signals which may be used by the first general purpose processor returning said signal characteristics to said memory means where they are accessable by said first general purpose processor, said second general purpose processor operating in parallel with said plurality of special purpose processors and said first general purpose processor to maximize use of idle time and to help ensure real-time performance of said electronic counter measure system in response to said detected signals.
Claim 5
Dependent Claim 228 words
A multi-processor control system for controlling an electronics counter measure system having a receiver which receives detected signals and a transmitter which transmits jamming signals to counter said detected signals, said multi-processor control system comprising: a plurality of special purpose processors including a first special purpose processor which acts as a waveform generator processor which is connected to said transmitter and directs said transmitter to transmit said jamming signals; a first general purpose processor which controls said electronics counter measure system by sending transmit control signals to said first special purpose processor, said control signals including azimuth and elevation directions and an identification of types of waveforms to be generated, said first general purpose processor sending receiver control signals to control the receiver; a second special purpose processor which receives said receiver control signals from said first general purpose processor and controls said receiver in response thereto, said second special purpose processor relaying said detected signals to said first general purpose processor; a memory means which receives and stores all signals coming to and from said first general purpose processor; and a second general purpose processor which receives said detected signals from said memory means and performs signal analysis to identify their characteristics, said second general purpose processor then outputting those characteristics to the memory means to enable the first general purpose processor to select effective jamming waveforms.
Claim 6
Dependent Claim 228 words
A multi-processor control system for controlling an electronics counter measure system having a receiver which receives detected signals and a transmitter which transmits jamming signals to counter said detected signals, said multi-processor control system comprising: a plurality of special purpose processors including a first special purpose processor which acts as a waveform generator processor which is connected to said transmitter and directs said transmitter to transmit said jamming signals; a first general purpose processor which controls said electronics counter measure system by sending transmit control signals to said first special purpose processor, said control signals including azimuth and elevation directions and an identification of types of waveforms to be generated, said first general purpose processor sending receiver control signals to control the receiver; a second special purpose processor which receives said receiver control signals from said first general purpose processor and controls said receiver in response thereto, said second special purpose processor relaying said detected signals to said first general purpose processor; a memory means which receives and stores all signals coming to and from said first general purpose processor; and a second general purpose processor which receives said detected signals from said memory means and performs signal analysis to identify their characteristics, said second general purpose processor then outputting those characteristics to the memory means to enable the first general purpose processor to select effective jamming waveforms.

References Cited (Backward Citations)

USRE26171E Cited
US4586046A Cited
US4042927A Cited
US3764999A Cited
US4019180A Cited
US3896442A Cited
US4209835A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-02-01 1991-08-03 1992-02-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-02-01 1995-08-03 1996-02-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-02-01 1999-08-03 2000-02-02 $7700.00 Window Closed / Lapsed

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