Translational phase locked loop using a quantized interpolated edge timed synthesizer

Claim 1

A signal generator responsive to a reference clock signal having a reference frequency to generate a desired output signal having an output frequency, the signal generator comprising: a phase detector, that has a feedback input and a reference signal input, and that compares a reference signal and generates a difference signal; a loop filter coupled to the phase detector, that generates a control signal in response to the difference signal; an oscillator coupled to the loop filter that generates an oscillator signal in response to the control signal and produces the output signal at an output; and a feedback circuit coupled to the output and the feedback input that accepts the output signal and couples the output signal to the feedback input of the phase detector, wherein the feedback circuit includes: a digital signal synthesizer coupled to the oscillator signal at an input, and a mixer coupled to the digital signal synthesizer to receive the synthesizer output at a first input, and being coupled to the output signal at a second input and wherein the output of the mixer is coupled to the feedback input of the phase detector.

Claim 9

A method of reducing phase noise content in a modulated signal, the method comprising: providing a phase modulated signal into a phase lock loop; and providing an output signal of the phase lock loop to a direct digital synthesizer within the feedback path of the phase lock loop: receiving the output signal of the phase lock loop at an input of the direct digital synthesizer; generating a synthesized signal to be received at an input of a switching mixer; receiving the output signal of the phase lock loop at a local oscillator input of the switching mixer; and generating a mixed output of the switching mixer at the phase detector input of the phase lock loop.

Claim 10

A method of reducing phase noise content in a modulated signal, the method comprising: providing a phase modulated signal into a phase lock loop; and providing an output signal of the phase lock loop to a direct digital synthesizer within the feedback path of the phase lock loop: receiving the output signal of the phase lock loop at an input of the direct digital synthesizer; generating a synthesized signal to be received at an input of a switching mixer; receiving the output signal of the phase lock loop at a local oscillator input of the switching mixer; and generating a mixed output of the switching mixer at the phase detector input of the phase lock loop.